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CN0180

Precision single-supply differential ADC driver for industrial-grade signals

 
Overview

Circuit functions and advantages

Standard single-ended industrial signal levels (±5 V, ±10 V, or 0 V to +10 V) are not directly compatible with the differential input ranges of modern high-performance 16-bit or 18-bit single-supply SAR ADCs and require the use of appropriate Interface driver circuits attenuate, level shift, and differentially convert industrial signals so that they have the correct amplitude and common-mode voltage to match the ADC input requirements.

Although it is possible to design a suitable interface circuit using a resistor network and a dual-channel op amp, the ratio matching error of the resistors and the error between the amplifiers will contribute to the error at the final output. Especially at low power levels, achieving the required output phase matching and settling time can be very difficult.

The circuit shown in Figure 1 uses the AD8475 differential amplifier to perform attenuation, level shifting, and differential conversion without any external components. Its AC and DC performance is compatible with the 18-bit, 1 MSPS AD7982 PulSAR® ADC and other 16/18-bit members in the family, with sampling rates up to 4 MSPS.

AD8475 is a fully differential attenuation amplifier that integrates precision thin film gain setting resistors and can provide functions such as precision attenuation (0.4× or 0.8×), common-mode level conversion, single-ended differential conversion, and input overvoltage protection. When powered from a single 5 V supply, its power consumption is only 15 mW. The 18-bit, 1 MSPS AD7982 consumes only 7 mW, which is 30 times lower than competing products. The combined power consumption is only 22 mW.

Figure 1. Single-ended to differential ADC driver (schematic diagram: decoupling and all connections not shown)

 

Circuit description

When powered from a single 5 V supply, the attenuation amplifier AD8475 and the 18-bit differential ADC AD7982 can be used to process large voltage signals in high-precision analog front-end systems.

The AD8475 attenuates the input signal by a factor of 0.4 through its integrated precision trim resistor. It supports voltages up to 25 V peak-to-peak when operating from a single 5 V supply. At low frequencies, the differential rail-to-rail output requires only 50 mV of headroom. The AD8475 can be driven from a true differential input, or it can be driven from a single-ended input and provide single-ended differential conversion, as shown in Figure 1.

The RC network between the AD8475 and the ADC forms a single-pole filter that reduces undesirable aliasing effects and high-frequency noise. The filter has a common-mode bandwidth of 29.5 MHz (20 Ω, 270 pF) and a differential bandwidth of 3.1 MHz (40 Ω, 1.3 nF).

The AD7982 is an 18-bit, successive approximation (SAR) ADC that operates from a single supply (VDD). The I/O interface voltage VIO can be set from 1.8 V to 5 V, depending on the interface logic supply. The AD7892 has true differential inputs and supports voltages up to ±V REF . The ADR435 is a 5 V, low noise (8 μV peak-to-peak, 0.1 Hz to 10 Hz), high accuracy (±2 mV at grade B) voltage reference used to provide the REF voltage for the AD7982 and the supply voltage for the differential driver AD8475 .

Two 10 kΩ resistors connected to the ADR435 output form a voltage divider that sets the 2.5 V common-mode voltage (VOCM) at the AD8475 output. This centers the input differential signal around the optimal common-mode input voltage, thereby maximizing the ADC's dynamic range.

For a 20 V peak-to-peak single-ended input signal, each differential output produces a signal that swings from +0.5 V to +4.5 V and is 180° out of phase.

When a 20 kHz, 20 V peak-to-peak signal is input into the AD8475, the final SNR is 96.3 dBFS and the THD is −112.3 dBFS; both parameters are referenced to the full-scale range of the AD7982, as shown in the FFT plot of Figure 2.

The signal levels shown in the table below the FFT plot were measured at the input of the AD7982. The full-scale range at this point is 10 V peak-to-peak differential, which is reflected to the input of the AD8475 as 25 V peak-to-peak. The input test signal is 20 V peak-to-peak, and the resulting signal is 2 dB lower than the full-scale input of the ADC.

Figure 2. FFT plot of 20 kHz signal, 2 dB below full scale, sampled at 1 MSPS

 

Note that under these conditions, each AD8475 output swings within ±500 mV of the supply rails, still achieving excellent distortion performance due to its rail-to-rail output structure.

For a complete design support package for this circuit note, please visit http://www.analog.com/CN0180-DesignSupport .

Figure 3. SAR ADC converter evaluation platform. Note: The AD8475 Differential Amplifier Evaluation Board connects to the SMB analog input connector of the PulSAR ADC Evaluation Board

 

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Update:2025-06-23 17:26:50

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