The circuit shown in Figure 1 is a dual-channel colorimeter integrating a modulated light source transmitter and a synchronous detector receiver. The circuit measures the ratio of light absorbed by the sample to the reference container at three different wavelengths.
This circuit provides an efficient solution for many chemical analysis and environmental monitoring instrumentation used to measure concentration and characterize materials through absorption spectroscopy.
The photodiode receiver conditioning path includes a programmable gain transimpedance amplifier that converts the diode current to a voltage and allows analysis of different liquids with widely different light absorption profiles. A 16-bit Σ-Δ analog-to-digital converter (ADC) provides additional dynamic range to ensure sufficient resolution for a wide range of photodiode output currents.
Using a modulated light source and synchronous detector instead of a constant current (DC) source eliminates measurement errors caused by ambient light and low-frequency noise and provides greater accuracy.
The AD8618 quad op amp forms three simple current sources to drive LEDs with constant current. The EVAL-SDP-CB1Z generates a 5 kHz clock that modulates an LED through the ADG633 single-pole double-throw (SPDT) switch to turn the reference voltage of its current source on or off. Setting the current sources of the other two LEDs to 0 V turns them off when not in use.
The beam splitter sends half of the light through the sample container and the other half through the reference container. Depending on the type and concentration of the medium in each container, the containers can absorb different amounts of light. A photodiode on the other side of each container generates a small amount of current, proportional to the amount of light received.
The first stage of each channel contains an AD8615 op amp configured as a transimpedance amplifier that converts the photodiode output current to a voltage. The AD8615 is a good choice as a photodiode amplifier because of its extremely low input bias current (1 pA), input offset voltage (100 μV), and noise (8 nV/√Hz). Although the signal is then ac coupled, it is still important to minimize dc errors in this stage to avoid loss of dynamic range. The op amp input bias current multiplied by the feedback resistor value at the output is the offset voltage. The op amp input offset voltage at the gain output depends on the feedback resistor and the photodiode shunt resistor. Additionally, any op amp input voltage offset flowing through the photodiode will cause an increase in photodiode dark current.
Figure 2 shows a typical transconductance amplifier with a single feedback resistor and its ideal transfer function.
Because some of the solutions being tested may have very strong absorptive properties, it is sometimes necessary to use a large feedback resistor in order to measure the very small currents produced by the photodiode, while at the same time being able to measure the large currents corresponding to highly dilute solutions. To solve this problem, the photodiode amplifier in Figure 1 contains two different selectable gains. One gain is set to 33 kΩ and the other is set to 1 MΩ. When a single SPDT switch is connected to the output of the op amp to switch the feedback resistor, the on-resistance of the ADG633 can cause a transimpedance gain error
To avoid this problem, Figure 3 shows a better configuration in which the ADG633 inside the feedback loop selects the desired resistor, while a second switch connects the next stage of the system to the selected feedback loop. The voltage at the amplifier output is:
V TIA OUTPUT = I PHOTODIODE × R FEEDBACK
rather than
V TIA OUTPUT = I PHOTODIODE × (R FEEDBACK + R ONADG633 )
It represents gain error. However, because one of the ADG633s is outside the feedback loop, the output impedance of this stage is the on-resistance of the ADG633 (typically 52 Ω) rather than the very low output impedance associated with the op amp output when operating in a closed loop.
Note that feedback capacitor C Fx is required for stability reasons to compensate for the total input capacitance (diode capacitance plus op amp input capacitance) as well as the pole created by feedback resistor R Fx . For details on this analysis, see Part 5 in Practical Design Tips for Sensor Signal Conditioning .
Even the best rail-to-rail output amplifiers such as the AD8615 cannot fully swing the output to the rails. Additionally, the input offset voltage on the AD8615 can be negative, albeit very small. The ADR4525 voltage reference biases the photodiode and amplifier to 2.5 V instead of using a negative supply to ensure that the amplifier does not clip and can therefore be driven to 0 V. The analog and digital portions of the board are powered with a 5 V linear regulator.
The photodiode amplifier output voltage can swing from 2.5 V to 5.0 V. For the 33 kΩ range, a 2.5 V output range corresponds to a full-scale photodiode current of 75.8 μA. For a 1 MΩ range this corresponds to 2.5 μA. When operating with a gain setting of 1 MΩ, it is important to protect the photodiode from outside light to prevent amplifier saturation. While the synchronous rectifier described below can greatly attenuate any frequency that is not synchronized with the LED clock, it will not function properly if the upper stage is attenuated. Gain settings for each channel are independently selectable via the EVAL-SDP-CB1Z board.
The next stage is a simple buffered AC coupled filter. The filter cutoff frequency is set to 7.2 Hz; it removes all output offset voltage and attenuates low-frequency light pollution caused by incandescent and fluorescent lamps and any other stray light that enters the photodiode. At the same time, the output of the ADR4525 also biases the circuit to 2.5 V; therefore, the output signal swing of this stage is nominally in the range of 1.25 V to 3.75 V.
The circuit immediately following the AC coupling filter is a synchronous rectifier circuit, which is composed of an AD8271 differential amplifier and an ADG733 three-way SPDT switch. The ADG733 internal switch is in series with the AD8271's internal 10 kΩ gain setting resistor; therefore, the ADG733's 4.5 Ω maximum on-resistance results in a gain error of only 0.05% and a temperature drift of less than 1 ppm/°C.
The rest of the system uses ADG633 switches because of their extremely low leakage current and low parasitic capacitance.
When the clock driving the LED is high, the switches within the ADG733 configure the AD8271 according to a simple transfer function as follows
V O = V IN
in:
V O is the output of the synchronous detector.
V IN is the input to the synchronous detector and ranges from 2.5 V to 3.75 V.
In this configuration, the synchronous rectifier acts as a unity gain amplifier.
When the clock driving the LED is low, the switches within the ADG733 configure the AD8271 according to the following transfer function
V O = 2V REF − V IN
in:
V REF is the 2.5 V output of the ADR4525.
V IN range is 1.25 V to 2.5 V.
In this case, when the input is 1.25 V (the minimum voltage that the AC coupling stage can output), the output of the synchronous rectifier is 3.75 V; and when the input is 2.5 V (the middle level of the AC coupling stage), the output of the synchronous rectifier The output is 2.5 V. In this configuration, the synchronous rectifier has a gain of −1 and is biased around the +2.5 V reference voltage.
Figure 4 is a system block diagram with the voltage range of each stage marked. The result after processing by the synchronous rectifier circuit is a variable DC voltage ranging from 2.5 V (no light reaches the photodiode) to 3.75 V (full-scale light input). This output voltage corresponds to a full-scale output swing of 1.25 V.
This circuit filters signals whose frequency is not synchronized with the LED clock (or odd harmonics, since the clock waveform is a square wave). In the frequency domain, the low-pass filter at the AD8271 output looks like a band-pass filter around the LED clock frequency. The lower the bandwidth of this filter, the better the synchronous rectifier suppresses out-of-band noise. Due to noise rejection and settling time trade-offs, the cutoff frequency of this filter is set to 16 Hz. It must be noted that the bandwidth of this filter is approximately equal to the LED clock. For example, if the LED modulation is 5 kHz, the 3 dB passband range of the synchronous detector is 4.984 kHz to 5.016 kHz.
The final stage of the system is the AD7798 , a low-noise, 16-bit, Σ-Δ ADC . The ADC integrates a built-in programmable gain amplifier (PGA) with differential inputs. Connect the 2.5 V reference to the AIN pin and set the PGA gain to 2 to allow it to map the synchronous rectifier's 2.5 V to 3.75 V output into a full-scale 16-bit output. In addition, the AD7798's output filter provides a minimum of 65 dB rejection at 50 Hz and 60 Hz, further attenuating any noise from the synchronous detector.
To verify that the front-end circuitry does not generate excessive noise on the system, data was collected with the LED disabled. The synchronous detector still operates at the LED clock frequency, but will not detect any light signal synchronized with this clock. Therefore, it removes all DC and AC signals except the errors generated by the AD8271 and ADC. Figure 5 shows the noise in this configuration, which is less than 1 LSB peak-to-peak for a single channel (ADC input centered between two codes) and 1 LSB peak-to-peak for the other channel (ADC input centered between two adjacent codes). in the transition area). Also, note that the measured voltage is negative, on the order of a few mV, which is expected performance in line with the typical offset error distribution of the AD8271.
Blockdiagram
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