Circuit functions and advantages

This circuit is a complete implementation of the analog part of a broadband direct conversion transmitter (analog baseband input, RF output). This circuit supports RF frequencies from 30 MHz to 2.2 GHz by using a phase-locked loop (PLL) and a wideband integrated voltage-controlled oscillator (VCO). Unlike modulators that use a divided-down local oscillator (LO) stage (as described in CN-0285), this circuit does not require harmonic filtering of the LO.

The only requirement for optimal performance is to drive the modulator's LO input differentially. The ADF4351 provides differential RF outputs, making it ideal for this circuit. The PLL-to-modulator interface is suitable for all I/Q modulators and I/Q demodulators that integrate a 2XLO phase splitter. Low-noise LDOs ensure that the power management scheme has no adverse impact on phase noise and error vector magnitude (EVM). This combination of devices provides industry-leading direct conversion transmitter performance from 30 MHz to 2.2 GHz. For frequencies above 2.2 GHz, a divide-by-one modulator is recommended, as described in CN-0285.

Circuit description

The circuit shown in Figure 1 uses the fully integrated fractional-N PLL IC ADF4351 . The ADF4351 provides the local oscillator (LO frequency is twice the modulator RF output frequency) signal to the transmit quadrature modulator ADL5385, which upconverts the analog I/Q signal to an RF signal. Together, the two devices provide a wideband baseband I/Q to RF transmit solution.

The ADF4351 is powered by an ultralow noise 3.3 V ADP150 regulator for optimal LO phase noise performance. The ADL5385 is powered by a 5 V ADP3334 LDO. The ADP150LDO's output voltage noise is only 9 μV rms, rms (10 Hz to 100 kHz integrated), helping to optimize VCO phase noise and reduce the impact of VCO pushing (equivalent to supply rejection). For more details on using the ADP150 LDO to power the ADF4351, see CN-0147 .

The ADL5385 uses a divide-by-two module to generate quadrature LO signals. Therefore, quadrature accuracy depends on the duty cycle accuracy of the input LO signal (and the matching of the internal divider flip-flop). Any imbalance in rise and fall times will cause even harmonics to appear, affecting the output of the ADF4351 RF. When the modulator LO input is driven differentially, even-order harmonics are eliminated, improving overall quadrature generation performance. (See “Wideband ADC Front-End Design Considerations: When to Use a Dual Transformer Configuration.” by Rob Reeder and Ramya Ramachandran, Analog Dialogue, 40-07 )

Since sideband suppression performance depends on the quadrature accuracy of the modulator, driving the LO input port differentially can achieve better sideband suppression than single-ended mode. The ADF4351 provides a differential RF output compared to the single-ended output used by most competing PLL devices with integrated VCOs.

The ADF4351 output matching includes the Z _BIAS pull-up resistor, and the decoupling capacitor of the power node also plays a role. To achieve broadband matching, it is recommended to use a resistive load (Z _BIAS = 50Ω) or to connect a resistive load in parallel with the reactive load of Z _BIAS . The latter provides slightly higher output power, depending on the inductor chosen. For LO operating frequencies below 1 GHz, use an inductor value of 19 nH or higher. The measurements for this circuit were made using Z _BIAS = 50 Ω; the output power was set to 5 dBm. This setup gives about 0 dBm per output over the full frequency range when using 50 Ω resistors; compared to 3 dBm when using differential inputs. The ADL5385 LO has an input drive level specification of −10 dBm to +5 dBm; therefore, it can reduce the output power of the ADF4351 and save power.

The sideband suppression performance versus RF output frequency sweep is shown in Figure 2. In this scan, the test conditions are as follows

• Baseband I/Q amplitude = 1.4 V pp differential sine wave with 500 mV DC bias positive

• Baseband I/Q frequency (fBB) = 1 MHz

• LO = 2 × RFOUT

A simplified block diagram of the test setup is shown in Figure 3. Since the standard ADL5385 board does not support differential LO input driving, a modified ADL5385 evaluation board was used in the testing.

Compared to the data sheet measurements using a low-noise RF signal generator to drive the ADL5385, this circuit achieves similar (or even better) sideband suppression performance. Utilizing the differential RF output of the ADF4351 eliminates even-order harmonics and improves the quadrature accuracy of the modulator. This affects sideband suppression performance and EVM. Measurements of the circuit shown in Figure 1 show that the single-carrier W-CDMA composite EVM of this circuit is better than 2%. Therefore, this circuit provides a low-EVM broadband solution for frequencies from 30 MHz to 2.2 GHz. For frequencies above 2.2 GHz, a divide-by-one modulator module can be used as described in CN-0285.