The STM32L476G-EVAL evaluation board has been designed as a complete demonstration and development platform for STMicroelectronics ARM® Cortex®-M4 core-based STM32L476ZGT6 microcontroller with three I²C buses, three SPI interfaces, six USART ports, CAN port, SWPMI, two SAI ports, 12-bit ADC, 12-bit DAC, LCD driver, internal 128-Kbyte SRAM and 1-Mbyte Flash memory, Quad-SPI port, touch-sensing capability, USB OTG FS port, LCD controller, Flexible Memory Controller (FMC), JTAG debugging support.
The full range of hardware features on the board helps user to evaluate all the peripherals (USB OTG FS, USART, digital microphones, ADC and DAC, dot-matrix TFT LCD, LCD glass module, IrDA (supported up to version MB1144 C-01 of the board), LDR, SRAM, NOR Flash memory device, Quad-SPI Flash memory device, microSD™card, sigma-delta modulators, smartcard with SWP, CAN transceiver, I²C, EEPROM, RF-EEPROM) and develop applications. Extension headers allow easy connection of a daughterboard or wrapping board for a specific application.
An ST-LINK/V2-1 is integrated on the board, as embedded in-circuit debugger and programmer for the STM32 MCU and the USB virtual COM port bridge.
Main features
All reference designs on this site are sourced from major semiconductor manufacturers or collected online for learning and research. The copyright belongs to the semiconductor manufacturer or the original author. If you believe that the reference design of this site infringes upon your relevant rights and interests, please send us a rights notice. As a neutral platform service provider, we will take measures to delete the relevant content in accordance with relevant laws after receiving the relevant notice from the rights holder. Please send relevant notifications to email: bbs_service@eeworld.com.cn.
It is your responsibility to test the circuit yourself and determine its suitability for you. EEWorld will not be liable for direct, indirect, special, incidental, consequential or punitive damages arising from any cause or anything connected to any reference design used.
Supported by EEWorld Datasheet