2013 Question D: RF Broadband Amplifier +733742A;

Topic analysis:

1. Content and requirements: 1. Task design and manufacture a radio frequency broadband amplifier. 2. Requirements 1. Basic requirements (1) Voltage gain Av20dB, input voltage effective value Ui20mV. Av is adjustable within the range of 0~20dB. (2) The maximum output sine wave voltage effective value Uo ≥ 200mV, and the output signal waveform has no obvious distortion. (3) The lower limit frequency of the amplifier BW-3dB is fL≤0.3MHz, the upper limit frequency is fH>20MHz, and the gain fluctuation is required to be 1dB in the 1MHz to 15MHz frequency band. (4) The input impedance of the amplifier=5, and the output impedance=500. 2. The voltage gain of part (1) is Av60dB, and the input voltage effective value Ui≤1 mVAv is adjustable in the range of 0~~60dB. (2) When Av≥60dB, the peak-to-peak value of the noise voltage at the output terminal UoNpp≤100mV. (3) The lower limit frequency of the amplifier BW-3dB is fL≤0.3MHz, the upper limit frequency is fH≥100MHz, and the gain fluctuation is required to be ≤1dB in the 1MHz to 80MHz frequency band. This project requires testing under the conditions of Av ≥ 60dB (or the highest achievable voltage gain point), the maximum output sine wave voltage effective value Uo = 1V, and the output signal waveform without obvious distortion. (4) The maximum output sine wave voltage effective value Uo ≥ 1V, and the output signal waveform has no obvious distortion.

(5) Others (such as further increasing the gain and bandwidth of the amplifier, etc.).

2. Design ideas

 Schematic analysis:

1. Pre-stage small signal amplification

Since the input signal in the system is less than 1mVrms, ERA-8SM is used for amplification in the first-stage small signal processing. The two modules can amplify the small signal 100 times, and the amplification performance is good, and the subsequent stage will not be amplified. Make an impact.

2. Controllable gain amplifier circuit

The controllable gain amplification circuit is implemented using the VCA821 chip. There are two implementation methods. The first is to adjust the amplification resistance by adjusting the sliding rheostat, and the second is to adjust it through the output voltage of the microcontroller.

3. High amplitude output design

Since the last stage needs to output an effective value of 2V, the operational amplifier must meet the SR requirement of greater than 1800V/us, so OPA695 is selected for implementation.

4. Control and display system design

The control is based on STM32F103VC [Ian] as the control core, and the display device uses LCD1602 as the display module.

program

The output and adjustment of voltage are realized through the DAC module and key function of STM32F103.

4. Physical picture display

1. Small signal amplification

 2. Gain amplification controller

3. High amplitude output

Physical functional testing

Function point 1 voltage gain Av60dB, adjustable within the range of 0~~60dB;

Function point 2: When Av≥60dB, the peak-to-peak value of the noise voltage at the output terminal UoNpp≤100mV

Function point 3 BW-3dB lower limit frequency fL ≤ 0.3MHz, upper limit frequency fH ≥ 100MHz, and requires gain fluctuation ≤ 1dB in the 1MHz ~ 80MHz frequency band;

Function point 4: The maximum output sine wave voltage effective value Uo ≥ 1V, and the output signal waveform has no obvious distortion.

Video link: https://www.bilibili.com/video/BV1M54y1U7A4/