BOM download
PCB_9cm Genshin Impact_2022-09-24.pdf
PCB_9cm Genshin Impact_2022-09-24.json
9cm Genshin Impact Pool_2022-09-24.pcbdoc
Gerber_9cm Genshin Impact.zip
61455
WCH-Link
Introduction: WCH-Link, produced based on Qinheng's official schematic diagram, can debug ARM and RISC-V architecture microcontrollers. It also has 1 serial port for convenient debugging output.
Referring to the official schematic diagram, there are almost no changes, except that the interface is changed to TYPE-C. It has been tested that it can debug ARM and RISC-V architecture microcontrollers, and it also has 1 serial port.
Detailed introduction can be viewed at Digital Home
https://www.mydigit.cn/thread-287203-1-1.html
PCB, project files, firmware and other information: Link: https://pan.baidu.com/s /1XP8IsFQYKRD82fJslzGJOg Extraction code: XDZZ
BOM download
61456
Xianyu 1.2VFD screen clock network time correction
Introduction: This clock is made with Xianyu 1.2 yuan VFD screen.
The clock is made with a Xianyu 1.2 yuan VFD screen and uses the 8266 module to obtain the network time. It does not use a clock chip and automatically obtains the network time every 300 seconds. The program is poorly written and is for reference only. The first version in the video uses three 595 driver segments and bits. Q communication group: 513391
66f6d104ead0434b700f7f98a03aed84.mp4
Specification: 14075-1A01.doc
8266vfd2595.zip
BOM download
PCB_PCB_PCB_2020-10-26_18-46-04_2022-01-12_2022-09-24.pdf
PCB_PCB_PCB_2020-10-26_18-46-04_2022-01-12_2022-09-24.json
PCB_PCB_2020-10-26_18-46-04_2022-01-12_2022-09-24.pcbdoc
Gerber_PCB_PCB_2020-10-26_18-46-04_2022-01-12.zip
Schematic_Xianyu 1.2VFD screen clock network time correction_2022-09-24.pdf
SCH_Xianyu 1.2VFD screen clock network time correction_2022-09-24.json
Sheet_1_2022-09-24.schdoc
61457
2022 China Jiliang University Lichuang Cup Title A Signal Hybrid Transmission System
Introduction: Infrared optical communication is used to realize mixed transmission of digital and analog signals. While signal demodulation is achieved at the receiving end, signal integrity is retained as much as possible and noise interference is reduced.
The transmitting end avoids signal interference and adopts synchronous and independent transmission;
the receiving end mainly uses a multi-order filter circuit to demodulate the two-way signals. After demodulation, the signal is restored through amplification, filtering, and envelope detection circuits;
the relay point mainly To achieve reception and retransmission, in order to retain the integrity of the signal, the relay point undergoes two-stage amplification. In order to reduce the operating current of the relay point, filtering is performed at the receiving end;
while ensuring the integrity of digital signal transmission, a Bluetooth module is added Implemented mobile display of temperature.
(Please see the attachment for details)
Design summary report.docx
BOM download
PCB_PCB_Signal Processing 2_2022-09-24.pdf
PCB_PCB_Signal Processing 2_2022-09-24.json
PCB_Signal Processing 2_2022-09-24.pcbdoc
Gerber_PCB_Signal processing 2.zip
PCB_PCB_Signal Processing 1_2022-09-24.pdf
PCB_PCB_Signal Processing1_2022-09-24.json
PCB_Signal Processing 1_2022-09-24.pcbdoc
Gerber_PCB_Signal processing1.zip
PCB_PCB_Relay circuit_2022-09-24.pdf
PCB_PCB_Relay circuit_2022-09-24.json
PCB_Relay circuit_2022-09-24.pcbdoc
Gerber_PCB_Relay circuit_2022-09-24.zip
PCB_PCB_launch part_2022-09-24.pdf
PCB_PCB_launch part_2022-09-24.json
PCB_launch part_2022-09-24.pcbdoc
Gerber_PCB_launch part_2022-09-24.zip
Schematic_2022 China Jiliang University Lichuang Cup Question A Signal Hybrid Transmission System_2022-09-24.pdf
SCH_2022 China Jiliang University Lichuang Cup Title A Signal Hybrid Transmission System_2022-09-24.json
2022 China Jiliang University Li Chuang Cup Title A Signal Hybrid Transmission System_2022-09-24.zip
61458
electronic
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