
AT32F435RGT7 Development Board
Do you still remember the previous AT32F403AVGT7 development board? After a period of study, this time we bring you the development board of the AT32 high-performance series AT32F435.
AT32F403A development board connection: https://oshwhub.com/fanhuacloud/at32f403avgt7
Chip description
Based on ARM® 32-bit CortexTM-M4F microcontroller + FPU, with 256K bytes to 4032K bytes of internal flash memory, sLib, dual QSPI, SDRAM, dual OTGFS, Ethernet, camera, 18 timers, 3 ADCs, 23 communication interfaces
Features
1. Almost all GPIOs are brought out
2. With SD card interface
3. Onboard DAP-LINK debugger
4. Dual OTG (considering the space, no USB Host port is made, you can make a board adapter yourself)
Development board peripherals
1. AT24C02 EEPROM
2. W25Q128JVPIQ 128Mbit Nor flash
3. Onboard DAP-LINK debugger (based on CH549G)
4. SD card interface
5. Buzzer
6. Two LED lights
7. Button (can be used as normal IO when not in use)
WCH-Link program burns
a new chip. It will automatically enter the burning mode when powered on for the first time. Download the software according to the attached WCH-LinkSCH.pdf, and then burn the program.
If there is a problem with burning, you can press and hold the button next to CH549 to manually enter the burning mode and burn the program.
Test code
SD card IO configuration
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_SDIO1_PERIPH_CLOCK, TRUE); gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_init_struct.gpio_mode = GPIO_MODE_MUX; gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; gpio_init_struct.gpio_pins = GPIO_PINS_10 | GPIO_PINS_11 | GPIO_PINS_12; gpio_init_struct.gpio_pull = GPIO_PULL_NONE; gpio_init(GPIOC, &gpio_init_struct);
gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_6; gpio_init(GPIOB, &gpio_init_struct); init_struct.gpio_pins = GPIO_PINS_2; gpio_init(GPIOD, &gpio_init_struct);
gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE10, GPIO_MUX_12); gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE11, GPIO_MUX_12); gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE12, GPIO_MUX_12); gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE0, GPIO_MUX_12); gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE6, GPIO_MUX_14); gpio_pin_mux_config(GPIOD , GPIO_PINS_SOURCE2, GPIO_MUX_12);
QSPI IO configuration
gpio_init_type gpio_init_struct; /* enable the dma clock */ crm_periph_clock_enable(CRM_DMA2_PERIPH_CLOCK, TRUE);
/* enable the qspi clock */ crm_periph_clock_enable(CRM_QSPI1_PERIPH_CLOCK, TRUE);
/* enable the pin clock */ crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
/* set default parameter */ gpio_default_para_init(&gpio_init_struct);
/* configure the io0 gpio */ gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; gpio_init_struct.gpio_mode = GPIO_MODE_MUX; gpio_init_struct.gpio_pins = GPIO_PINS_6; gpio_init_struct.gpio_pull = GPIO_PULL_NONE; gpio_init(GPIOA, &gpio_init_struct); gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE6, GPIO_MUX_10);
/* configure the io1 gpio */ gpio_init_struct.gpio_pins = GPIO_PINS_7; gpio_init(GPIOA, &gpio_init_struct); gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE7, GPIO_MUX_10);
/* configure the io2 gpio */ gpio_init_struct.gpio_pins = GP IO_PINS_4; gpio_init(GPIOC, &gpio_init_struct) ; gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE4, GPIO_MUX_10);
/* configure the io3 gpio */ gpio_init_struct.gpio_pins = GPIO_PINS_5; gpio_init(GPIOC, &gpio_init_struct); gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE5, GPIO_MUX_10);
/* configure the sck gpio */ gpio_init_struct.gpio_pins = GPIO_PINS_1; gpio_init(GPIOB, &gpio_init_struct); gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE1, GPIO_ MUX_9);
/* configure the cs gpio */ gpio_init_struct.gpio_pins = GPIO_PINS_10; gpio_init(GPIOB, &gpio_init_struct); gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE10, GPIO_MUX_9);
EEPROM IO configuration
#define I2Cx_PORT I2C3#define I2Cx_CLK CRM_I2C3_PERIPH_CLOCK#define I2Cx_DMA DMA1#define I2Cx_DMA_CLK CRM_DMA1_PERIPH_CLOCK
#define I2Cx_SCL_GPIO_CLK CRM_GPIOA_PERIPH_CLOCK#define I2Cx_SCL_GPIO_PIN GPIO_PINS_8#define I2Cx_SCL_GPIO_P insSource GPIO_PINS_SOURCE8#define I2Cx_SCL_GPIO_PORT GPIOA#define I2Cx_SCL_GPIO_MUX GPIO_MUX_4
#define I2Cx_SDA_GPIO_CLK CRM_GPIOC_PERIPH_CLOCK#define I2Cx_SDA_GPIO_PIN GPIO_PINS_9#define I2Cx_SDA_GPIO_PinsSource GPIO_PINS_SOURCE9#define I2Cx_SDA_GPIO_PORT GPIOC#define I2Cx_SDA_GPIO_MUX GPIO_MUX_4
#define I2Cx_DMA_TX_Channel DMA1_CHANNEL1#define I2Cx_DMA_TX_DMAMUX_Channel DMA1MUX_CHANNEL1#define I2Cx_ DMA_TX_DMAREQ DMAMUX_DMAREQ_ID_I2C3_TX#define I2Cx_DMA_TX_IRQn DMA1_Channel1_IRQn
#define I2Cx_DMA_RX_Channel DMA1_CHANNEL2#define I2Cx_DMA_RX_DMAMUX_Channel DMA1MUX_CHANNEL2#define I2Cx_DMA_RX_DMAREQ DMAMUX_DMAREQ_ID_I2C3_RX#define I2Cx_DMA_RX_IRQn DMA1_Channel2_IRQn
#define I2Cx_EVT_IRQn I2C3_EVT_IRQn#define I2Cx_ERR_IRQn I2C3_ERR_IRQn
#define I2Cx_DMA_TX_IRQHandler DMA1_Channel1_IRQHandler#define I2Cx_DMA_RX_IRQHandler DMA1_Channel2_IRQHandler#define I2Cx_EVT_IRQHandler I2C3_EVT_IRQHandler#define I2Cx_ERR_IRQHandler I2C3_ERR_IRQHandler
The test routine
will be updated later, and you can use the test routine to test the welding quality.
Show pictures
