STC8H3K32S2 Development Board

Verified!
Commercial use is strictly prohibited without permission!!!

LGPL 3.0
is prohibited for commercial use and sale by replicators.

This project is based on STC8H3K32S2-45I-TSSOP20.
Function Introduction:

Onboard 3V3LDO for 3V3 sensors and other external modules.
Utilizes a male and female header – avoiding the need for DuPont wires.
Onboard IIC screen female connector (0.96 inch) – starting with GND – allows for pin re-insertion (if starting with VCC, you can switch accordingly) and precise measurement of distance from other ports – no conflict
(DuPont wires can be inserted even with a screen).
Onboard 3V3-1, VCC-2, GND-3 power
pins are all brought out – excellent expandability.
Onboard RESET button and P1.0 LED, P1.1 tactile switch.
Download port directly brought out – convenient for downloading and debugging.

II. Chip Introduction
Features:
Core
• Ultra-high-speed 8051 core (1T), approximately 12 times faster than the traditional 8051, instruction code fully compatible with the traditional 8051
• 19 interrupt sources, 4 Interrupt priority level
• Supports in-circuit simulation
Operating voltage
• 1.9V～5.5V
Operating temperature
• -40℃～85℃
Flash memory
• Maximum 64K bytes of FLASH program memory (ROM) for storing user code
• Supports user-configurable EEPROM size, 512-byte single-page erase, over 100,000 erase/write cycles
• Supports in-system programming (ISP) updates for user applications without a dedicated programmer
• Supports single-chip simulation without a dedicated emulator, theoretically unlimited number of breakpoints
SRAM
• 128 bytes of internal direct access RAM (DATA)
• 128 bytes of internal indirect access RAM (IDATA)
• 3072 bytes of internal extended RAM (internal XDATA)
Clock control
• Internal high-precision IRC (4MHz～45MHz, selected during ISP programming or manually input, can also be divided by user software to operate at a lower frequency, such as 100KHz)
– Error ±0.3% (at room temperature 25℃)
– -1.35%～+1.30% temperature drift (full temperature range, -40℃～85℃)
– -0.76%～+0.98% temperature drift (temperature range, -20℃～65℃)
• Internal 32KHz low-speed IRC (larger error)
• External crystal oscillator (4MHz～45MHz) and external clock
• User can freely select the above 3 clock sources
for reset
• Hardware reset
– Power-on reset (effective when the low-voltage reset function is not enabled)
– Reset pin reset (high-level reset), P5.4 is the default IO port at the factory, and the P5.4 pin can be set as the reset pin during ISP download
– Watchdog overflow reset
– Low-voltage detection reset, providing 4 levels of low-voltage detection voltage: 2.2V, 2.4V, 2.7V, 3.0V
• Software reset
– Software mode write reset trigger register
interrupt
• Provides 19 Interrupt sources: INT0 (supports rising and falling edge interrupts), INT1 (supports rising and falling edge interrupts), INT2 (supports falling edge interrupt only), INT3 (supports falling edge interrupt only), INT4 (supports falling edge interrupt only), Timer 0, Timer 1, Timer 2, Timer 3, Timer 4, Serial Port 1, Serial Port 2, ADC (Analog-to-Digital Conversion), LVD (Low Voltage Detection), SPI, I2C, Comparator, PWMA, PWMB
. Provides 4 interrupt priority levels
. Interrupts that can be woken up in clock stop mode: INT0 (P3.2), INT1 (P3.3), INT2 (P3.6), INT3 (P3.7), INT4 (P3.0), T0 (P3.4), T1 (P3.5), T2 (P1.2), T3 (P0.4), T4 (P0.6), RXD (P3.0/P3.6/P1.6/P4.3), RXD2 (P1.0/P4.6). I2C_SDA (P1.4/P2.4/P3.3) and comparator interrupt, low voltage detection interrupt, power-down wake-up timer wake-up.
Digital Peripherals
: • Five 16-bit Timers: Timer 0, Timer 1, Timer 2, Timer 3, and Timer 4. Timer 0's Mode 3 has NMI (Non-Maskable Interrupt) functionality, and Timer 0 and Timer 1's Mode 0 are 16-bit auto-reload modes.
• Two High-Speed ​​Serial Ports: Serial Port 1 and Serial Port 2, with a baud rate clock source up to FOSC/4.
• Eight Channels/Two Groups of Advanced PWM, enabling control signals with dead time and supporting external anomaly detection. It also supports 16-bit timers, eight external interrupts, and eight external capture measurement pulse width functions.
• SPI: Supports master and slave modes and automatic master/slave switching.
• I2C: Supports master and slave modes.
• MDU16: Hardware 16-bit multiplier and divider (supports 32-bit to 16-bit, 16-bit to 16-bit, 16-bit multiplication, data shifting, and data normalization operations).
• I/O Port Interrupts: All I/O ports. All I/O interrupts are supported, with each group having an independent interrupt entry address. All I/O interrupts support four interrupt modes: high-level interrupt, low-level interrupt, rising-edge interrupt, and falling-edge interrupt.
Analog peripherals include
: • Ultra-high-speed ADC, supporting 12-bit high-precision 12-channel (channels 0-2, 6-14; without P1.3/P1.4/P1.5 ports, channels 3-5 are missing) analog-to-digital conversion, with a maximum speed of 800K (800,000 ADC conversions per second).
• ADC channel 15 is used to test the internal 1.19V reference signal source (the internal reference signal source is adjusted to 1.19V at the factory).
• Comparators: A set of comparators (the positive terminal of the comparator can be selected from the CMP+ port and all ADC input ports, so the comparator can be used as a time-division multiplexer).
• DAC: 8-channel advanced PWM timers that can function as 8-channel DACs. Use
GPIO (this project uses TSSOP20-20PIN).
• Up to 43 GPIOs: P0.0~P0.7, P1.0~P1.2, P1.6~P1.7, P2.0~P2.7, P3.0~P3.7, P4.0~P4.7, P5.0~P5.5
• All GPIOs support the following four modes: Quasi-bidirectional port mode, Strong push-pull output mode, Open-drain output mode, and High-impedance input mode
• Except for P3.0 and P3.1, all other I/O ports are in a high-impedance input state after power-on. Users must set the I/O port mode before using it.
• Each I/O port can also independently enable its internal 4K pull-up resistor
. III. Engineering Demonstration :
3D Drawings &
Physical Display