Problems with 100M optical transmission[Copy link]
I am using Xilinx's transceiver to implement 100M optical transmission recently, but I have a question when reading the 802.3 protocol. The idle code after 4b/5b encoding is all 1, and I haven't seen any mention of adding scrambling code in the protocol. I would like to ask if anyone knows. Thank you. The general process I implemented is to convert the data of the GMII interface (8bit, 12.5M) into MII (4bit, 25M) data, and then synchronize the data to the clock domain of the transceiver (also 25M), and then do 4b/5b encoding, and then convert the 5bit 25M data into 4bit 31.25M data, and finally oversample the 4bit data to expand it to 16bit and send it to the interface of the transceiver IP core (the reason for oversampling is that the minimum line rate of the transceiver is 500M). This is the general process of my data transmission. I would like to ask if there is a scrambling process after 4b/5b encoding, but I didn't see it in the protocol. Please give me some advice. Thank you~~
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