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MC54F378

Description
PARALLEL D REGISTER WITH ENABLE
File Size32KB,3 Pages
ManufacturerMotorola ( NXP )
Websitehttps://www.nxp.com
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MC54F378 Overview

PARALLEL D REGISTER WITH ENABLE

MC54/74F378
PARALLEL D REGISTER
WITH ENABLE
The MC54/74F378 is a 6-bit register with a buffered common enable. This
device is similar to the F174 but with common Enable rather than common
Master Reset.
The F378 consists of six edge-triggered D-type flip-flops with individual D
inputs and Q outputs. The Clock (CP) and Enable (E) inputs are common to
all flip-flops.
When the E input is LOW, new data is entered into the register on the LOW-
to-HIGH transition of the CP input. When the E input is HIGH the register will
retain the present data independent of the CP input. This circuit is designed
to prevent false clocking by transitions on the E input..
PARALLEL D REGISTER
WITH ENABLE
FAST™ SCHOTTKY TTL
6-Bit High-Speed Parallel Register
Positive Edge-Triggered D-Type Inputs
Fully Buffered Common Clock and Enable Inputs
Input Clamp Diodes Limit High-Speed Termination Effects
CONNECTION DIAGRAM
(TOP VIEW)
VCC
16
Q5
15
D5
14
D4
13
Q4
12
D3
11
Q3
10
CP
9
J SUFFIX
CERAMIC
CASE 620-09
16
1
16
1
N SUFFIX
PLASTIC
CASE 648-08
16
1
D SUFFIX
SOIC
CASE 751B-03
1
E
2
Q0
3
D0
4
D1
5
Q1
6
D2
7
Q2
8
GND
ORDERING INFORMATION
MC54FXXXJ
MC74FXXXN
MC74FXXXD
Ceramic
Plastic
SOIC
FUNCTION TABLE
Inputs
E
H
L
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
Output
Dn
X
H
L
Qn
No Change
H
L
CP
LOGIC SYMBOL
14
13
11
6
4
3
1
D5
D4
D3
D2
D1
D0
E
Q5
Q4
Q3
Q2
Q1
Q0
CP
9
15
12
10
7
5
2
VCC = PIN 16
GND = PIN 8
FAST AND LS TTL DATA
4-173

MC54F378 Related Products

MC54F378 MC74F378 MC74F378D MC74F378N
Description PARALLEL D REGISTER WITH ENABLE PARALLEL D REGISTER WITH ENABLE PARALLEL D REGISTER WITH ENABLE PARALLEL D REGISTER WITH ENABLE

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