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IDT74LVCHR162245APAG

Description
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3 STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD
File Size100KB,6 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
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IDT74LVCHR162245APAG Overview

3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3 STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD

IDT74LVCHR162245A
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 16-BIT
IDT74LVCHR162245A
BUS TRANSCEIVER
WITH 3 STATE OUTPUTS,
5 VOLT TOLERANT I/O, BUS-HOLD
• Typical t
SK(o)
(Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• V
CC
= 3.3V ± 0.3V, Normal Range
• V
CC
= 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µ W typ. static)
µ
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SSOP, TSSOP, and TVSOP packages
FEATURES:
DESCRIPTION:
DRIVE FEATURES:
APPLICATIONS:
• Balanced Output Drivers: ±12mA
• Low switching noise
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
This 16-bit bus transceiver is built using advanced dual metal CMOS
technology. This high-speed, low power device is ideal for asynchronous
communication between two buses (A and B). The Direction and Output
Enable controls are designed to operate this device as either two indepen-
dent 8-bit transceivers or one 16-bit transceiver. The direction control pin
(DIR) controls the direction of data flow. The output enable pin (OE)
overrides the direction control and disables both ports. All inputs are
designed with hysteresis for improved noise margin.
All pins can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
The LVCHR162245A has series resistors in the device output structure
which will significantly reduce line noise when used with light loads. The
driver has been designed to drive ±12mA at the designated threshold
levels.
The LVCHR162245A has “bus-hold” which retains the inputs' last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
FUNCTIONAL BLOCK DIAGRAM
1
DIR
1
48
24
2
DIR
25
1
OE
1
A
1
47
2
46
2
OE
2
A
1
36
13
35
1
B
1
2
A
2
2
B
1
1
A
2
3
1
B
2
1
A
3
44
5
33
14
2
B
2
2
A
3
16
1
B
3
1
A
4
43
6
32
2
B
3
2
A
4
17
1
B
4
1
A
5
41
8
2
B
4
2
A
5
30
19
1
B
5
1
A
6
40
9
38
11
2
B
5
2
A
6
1
B
6
2
A
7
1
B
7
29
20
27
22
2
B
6
1
A
7
2
B
7
2
A
8
26
23
1
A
8
37
12
1
B
8
2
B
8
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 1999 Integrated Device Technology, Inc.
MARCH 1999
DSC-4598/2

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