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MVTX2801AG

Description
Unmanaged 4-Port 1000 Mbps Ethernet Switch
CategoryWireless rf/communication    Telecom circuit   
File Size575KB,106 Pages
ManufacturerZarlink Semiconductor (Microsemi)
Websitehttp://www.zarlink.com/
Download Datasheet Parametric Compare View All

MVTX2801AG Overview

Unmanaged 4-Port 1000 Mbps Ethernet Switch

MVTX2801AG Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerZarlink Semiconductor (Microsemi)
package instructionHBGA, BGA596(UNSPEC)
Reach Compliance Codecompli
JESD-30 codeS-PBGA-B596
JESD-609 codee0
length40 mm
Humidity sensitivity level1
Number of functions1
Number of terminals596
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeHBGA
Encapsulate equivalent codeBGA596(UNSPEC)
Package shapeSQUARE
Package formGRID ARRAY, HEAT SINK/SLUG
Peak Reflow Temperature (Celsius)225
power supply2.5,3.3 V
Certification statusNot Qualified
Maximum seat height2.46 mm
Nominal supply voltage2.5 V
surface mountYES
technologyCMOS
Telecom integrated circuit typesLAN SWITCHING CIRCUIT
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formBALL
Terminal pitch1.27 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperature30
width40 mm
MVTX2801
Unmanaged 4-Port 1000 Mbps
Ethernet Switch
Data Sheet
Features
4 Gigabit Ports with GMII and PCS interface
-
Gigabit Port can also support 100/10 Mbps MII
interface
Ordering Information
MVTX2801AG
596-pin HSBGA
October 2003
High Performance Layer 2 Packet Forwarding
(11.904M packets per second) and Filtering at
Full-Wire Speed
Maximum throughput is 4 Gbps non-blocking
Centralized shared-memory architecture
Consists of two Memory Domains at 133 MHz
-
-
Frame Buffer Domain: one bank of ZBT-SRAM
with 1M/2MB total
Switch Database Domain with 256K/512K
SRAM.
-40°C to +85°C
Provides 2 level dropping precedence with WRED
mechanism
-
-
-
-
User controlled thresholds for WRED
VLAN Priority field in VLAN tagged frame.
DS/TOS field in IP packet
The precedence of above two classifications
can be programmable
Classification based on layer 2, 3 markings
Up to 64K MAC addresses to provide large node
aggregation in wiring closet switches
QoS Support
Supports IEEE 802.1p/Q Quality of Service with 8
Priority
Buffer Management: reserve buffers on per class
and per port basis
Traffic Classification
Classify traffic into 8 transmission priorities per
port
Supports Delay bounded, Strict Priority, and WFQ
Frame Data Buffer A
ZBT-SRAM (1M/2MB)
SRAM 256/512K
SW Databasee
MAC Table
32bit
SDB Interface
LED
Search
Engine
NM
Database
VTX2800
64bit
FDB Interface
Frame
Engine
Scheduler
Management
Module
GMII
/PCS
Port 0
GMII
/PCS
Port 1
GMII
/PCS
Port 2
GMII
/PCS
Port 3
Serial /
I2C
Figure 1 - Chip Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved.

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