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74LVC126AD

Description
LVC/LCX/Z SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14
Categorylogic    logic   
File Size101KB,20 Pages
ManufacturerPhilips Semiconductors (NXP Semiconductors N.V.)
Websitehttps://www.nxp.com/
Environmental Compliance
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74LVC126AD Overview

LVC/LCX/Z SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14

74LVC126AD Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerPhilips Semiconductors (NXP Semiconductors N.V.)
package instructionSOP, SOP14,.25
Reach Compliance Codeunknow
Control typeENABLE HIGH
JESD-30 codeR-PDSO-G14
JESD-609 codee4
Logic integrated circuit typeBUS DRIVER
MaximumI(ol)0.024 A
Number of digits4
Number of functions1
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingTUBE
power supply3.3 V
Prop。Delay @ Nom-Su6 ns
Certification statusNot Qualified
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL

74LVC126AD Preview

INTEGRATED CIRCUITS
DATA SHEET
74LVC126A
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
Product specification
Supersedes data of 2002 Mar 8
2003 Feb 28
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
FEATURES
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
Inputs accept voltages up to 5.5 V
Complies with JEDEC standard no. 8-1A
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
Specified from
−40
to +85
°C
and
−40
to +125
°C.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
2.5 ns.
SYMBOL
t
PHL
/t
PLH
C
I
C
PD
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
Σ(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = total load switching outputs;
Σ(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC
.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
74LVC126AD
74LVC126ADB
74LVC126APW
74LVC126ABQ
TEMPERATURE RANGE
PINS
−40
to +125
°C
−40
to +125
°C
−40
to +125
°C
−40
to +125
°C
14
14
14
14
PACKAGE
SO14
SSOP14
TSSOP14
DHVQFN14
PARAMETER
propagation delay nA to nY
input capacitance
power dissipation capacitance per gate
V
CC
= 3.3 V;
notes 1 and 2
CONDITIONS
C
L
= 50 pF; V
CC
= 3.3 V
DESCRIPTION
74LVC126A
The 74LVC126A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 or 5 V devices.
In 3-state operation, outputs can handle 5 V.
The 74LVC126A consists of four non-inverting buffers/line
drivers with 3-state outputs (nY) which are controlled by
the output enable input (nOE). A LOW at nOE causes the
outputs to assume a high-impedance OFF-state.
TYPICAL
2.4
4.0
12
ns
pF
pF
UNIT
MATERIAL
plastic
plastic
plastic
plastic
CODE
SOT108-1
SOT337-1
SOT402-1
SOT762-1
2003 Feb 28
2
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
FUNCTION TABLE
See note 1.
INPUT
nOE
H
H
L
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
PINNING
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1OE
1A
1Y
2OE
2A
2Y
GND
3Y
3A
3OE
4Y
4A
4OE
V
CC
SYMBOL
data input
data output
nA
L
H
X
74LVC126A
OUTPUT
nY
L
H
Z
DESCRIPTION
data enable input (active HIGH)
data enable input (active HIGH)
data input
data output
ground (0 V)
data output
data input
data enable input (active HIGH)
data output
data input
data enable input (active HIGH)
supply voltage
2003 Feb 28
3
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
handbook, halfpage
1OE
1
VCC
14
13
12
4OE
4A
4Y
3OE
3A
1OE
1A
1Y
2OE
2A
2Y
GND
1
2
3
4
5
6
7
MNA233
14 VCC
13 4OE
12 4A
1A
1Y
2OE
2
3
4
5
6
126
11 4Y
10 3OE
9
3A
2A
2Y
GND
(1)
11
10
9
8 3Y
7
Top view
GND
8
3Y
MCE197
* The die substrate is attached to this pad using conductive die attach
material. It can not be used as a supply pin or input.
Fig.1 Pin configuration SO14 and (T)SSOP14.
Fig.2 Pin configuration DHVQFN14.
handbook, halfpage
2
1
5
4
9
10
12
13
1A
1OE
2A
2OE
3A
3OE
4A
4OE
1Y
3
handbook, halfpage
2
1
EN1
1
3
2Y
6
5
6
4
3Y
8
9
8
10
4Y
11
12
11
13
MNA236
MNA235
Fig.3 Logic symbol.
Fig.4 Logic symbol (IEEE/IEC).
2003 Feb 28
4
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
handbook, halfpage
nA
nY
nOE
MNA234
Fig.5 Logic diagram.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
V
I
V
O
T
amb
t
r
, t
f
PARAMETER
supply voltage
input voltage
output voltage
operating ambient temperature
input rise and fall times
V
CC
= 1.2 to 2.7 V
V
CC
= 2.7 to 3.6 V
output HIGH or LOW state
output 3-state
CONDITIONS
for maximum speed performance
for low voltage applications
MIN.
2.7
1.2
0
0
0
−40
0
0
MAX.
3.6
3.6
5.5
V
CC
5.5
+125
20
10
V
V
V
V
V
°C
ns/V
ns/V
UNIT
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
GND
, I
CC
T
stg
P
tot
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. For SO14 packages: above 70
°C
the value of P
tot
derates linearly with 8 mW/K.
For (T)SSOP14 packages: above 60
°C
the value of P
tot
derates linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60
°C
the value of P
tot
derates linearly with 4.5 mW/K.
2003 Feb 28
5
PARAMETER
supply voltage
input diode current
input voltage
output diode current
output voltage
output source or sink current
V
CC
or GND current
storage temperature
power dissipation per package
T
amb
=
−40
to +125
°C;
note 2
V
I
< 0
note 1
V
O
> V
CC
or V
O
< 0
output HIGH or LOW state; note 1
output 3-state; note 1
V
O
= 0 to V
CC
CONDITIONS
−0.5
−0.5
−0.5
−65
MIN.
−0.5
MAX.
+6.5
−50
+6.5
±50
+6.5
±50
±100
+150
500
V
mA
V
mA
V
mA
mA
°C
mW
UNIT
V
CC
+ 0.5 V

74LVC126AD Related Products

74LVC126AD 74LVC126A 74LVC126ADB 74LVC126ABQ
Description LVC/LCX/Z SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14 LVC/LCX/Z SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14 LVC/LCX/Z SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14 LVC/LCX/Z SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14
Number of digits 4 1 4 4
Number of functions 1 4 1 1
Number of terminals 14 14 14 14
Maximum operating temperature 125 °C 125 Cel 125 °C 125 °C
Minimum operating temperature -40 °C -40 Cel -40 °C -40 °C
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE
Output polarity TRUE TRUE TRUE TRUE
surface mount YES YES YES YES
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal form GULL WING GULL WING GULL WING NO LEAD
Terminal location DUAL DUAL DUAL QUAD
Is it Rohs certified? conform to - conform to conform to
Maker Philips Semiconductors (NXP Semiconductors N.V.) - Philips Semiconductors (NXP Semiconductors N.V.) Philips Semiconductors (NXP Semiconductors N.V.)
package instruction SOP, SOP14,.25 - SSOP, SSOP14,.3 QCCN, LCC14,.1X.12,20
Reach Compliance Code unknow - unknow unknow
Control type ENABLE HIGH - ENABLE HIGH ENABLE HIGH
JESD-30 code R-PDSO-G14 - R-PDSO-G14 R-PQCC-N14
Logic integrated circuit type BUS DRIVER - BUS DRIVER BUS DRIVER
MaximumI(ol) 0.024 A - 0.024 A 0.024 A
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP - SSOP QCCN
Encapsulate equivalent code SOP14,.25 - SSOP14,.3 LCC14,.1X.12,20
Package shape RECTANGULAR - RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE - SMALL OUTLINE, SHRINK PITCH CHIP CARRIER
method of packing TUBE - TUBE TAPE AND REEL
power supply 3.3 V - 3.3 V 3.3 V
Prop。Delay @ Nom-Su 6 ns - 6 ns 6 ns
Certification status Not Qualified - Not Qualified Not Qualified
Nominal supply voltage (Vsup) 3.3 V - 3.3 V 3.3 V
technology CMOS - CMOS CMOS
Terminal pitch 1.27 mm - 0.635 mm 0.5 mm
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