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74ACT10_05

Description
AC SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14
Categorysemiconductor    logic   
File Size100KB,7 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Download Datasheet Parametric Compare View All

74ACT10_05 Overview

AC SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14

74ACT10_05 Parametric

Parameter NameAttribute value
Number of functions3
Number of terminals14
Maximum operating temperature85 Cel
Minimum operating temperature-40 Cel
Maximum supply/operating voltage6 V
Minimum supply/operating voltage2 V
Rated supply voltage3.3 V
Processing package description0.150 INCH, MS-012, SOIC-14
stateACTIVE
CraftsmanshipCMOS
packaging shapeRECTANGULAR
Package SizeSMALL OUTLINE
surface mountYes
Terminal formGULL WING
Terminal spacing1.27 mm
terminal coatingMATTE TIN
Terminal locationDUAL
Packaging MaterialsPLASTIC/EPOXY
Temperature levelINDUSTRIAL
seriesAC
Logic IC typeNAND
Number of inputs3
propagation delay TPD10.5 ns
74AC10 • 74ACT10 Triple 3-Input NAND Gate
November 1988
Revised February 2005
74AC10 • 74ACT10
Triple 3-Input NAND Gate
General Description
The AC/ACT10 contains three, 3-input NAND gates.
Features
s
I
CC
reduced by 50% on 74AC only
s
Outputs source/sink 24 mA
Ordering Code:
Order Number
74AC10SC
74AC10SJ
74AC10MTC
74AC10PC
74AC10PC_NL
(Note 1)
74ACT10SC
74ACT10PC
Package Number
M14A
M14D
MTC14
N14A
N14A
M14A
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Pb-Free 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1:
“_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Use this number to order device.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
A
n
, B
n
, C
n
O
n
Description
Inputs
Outputs
© 2005 Fairchild Semiconductor Corporation
DS009915
www.fairchildsemi.com

74ACT10_05 Related Products

74ACT10_05 74AC10SJ 74AC10 74ACT10PC 74ACT10SC 74AC10PC-NL
Description AC SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14 AC SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14 AC SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14 AC SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14 AC SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14 AC SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14
Number of functions 3 3 3 3 3 3
Number of terminals 14 14 14 14 14 14
Maximum operating temperature 85 Cel 85 °C 85 Cel 85 °C 85 °C 85 Cel
Minimum operating temperature -40 Cel -40 °C -40 Cel -40 °C -40 °C -40 Cel
surface mount Yes YES Yes NO YES Yes
Terminal form GULL WING GULL WING GULL WING THROUGH-HOLE GULL WING GULL WING
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
series AC AC AC ACT ACT AC

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