CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
T
A
= 25
o
C, V+ = +15V, V- = -15V
“C” SUFFIX
PARAMETER
DYNAMIC CHARACTERISTICS
Turn-ON Time (Note 3), t
ON
Turn-OFF Time (Note 3), t
OFF
Charge Injection, Q
Off Isolation Rejection Ratio, OIRR
Crosstalk (Channel-to-Channel), CCRR
DIGITAL INPUT CHARACTERISTICS
Input Logic Current, I
IN(ON)
Input Logic Current, I
N(OFF)
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
Drain-Source ON Resistance, r
DS(ON)
Channel-to-Channel
r
DS(ON)
Match, r
DS(ON)
Drain OFF Leakage Current, I
D(OFF)
Source OFF Leakage Current, I
S(OFF)
Channel ON Leakage
Current, I
D(ON)
+ I
S(ON)
POWER SUPPLY CHARACTERISTICS
Supply Current, I+ Positive
Supply Current, I- Negative
NOTES:
TEST CONDITIONS
0
o
C
(NOTE 2)
25
o
C
70
o
C
UNITS
R
L
= 1kΩ, V
ANALOG
= -10V to +10V (Figure 1)
R
L
= 1kΩ, V
ANALOG
= -10V to +10V (Figure 1)
Figure 2
f = 1MHz, R
L
= 100Ω, C
L
≤
5pF, (Figure 3)
One Channel Off
-
-
-
-
-
1.0
0.5
20 (Typ)
50 (Typ)
-50 (Typ)
-
-
-
-
-
µs
µs
mV
dB
dB
V
IN
= 0.8V (Note 3)
V
IN
= 2.4V (Note 3)
±1
±1
±1
±1
±10
±10
µA
µA
-
I
S
= 10mA, V
ANALOG
=
±10V
100
-
V
ANALOG
= -14V to +14V
V
ANALOG
= -14V to +14V
V
D
= V
S
= -14V to +14V
-
-
-
±15
(Typ)
100
30 (Typ)
±5
±
5
±5
-
125
-
100
100
200
V
Ω
Ω
nA
nA
nA
V
IN
= 0V or V
IN
= 5V
2000
2000
1000
1000
2000
2000
µA
µA
2. Typical values are for design aid only, not guaranteed and not subject to production testing.
3. All channels are turned off by high “1” logic inputs and all channels are turned on by low “0” inputs; however 0.8V to 2.4V describes the minimum
range for switching properly. Peak input current required for transition is typically -120µA.
3
DG201
Test Circuits
ANALOG
INPUT 10V
3V
0V
LOGIC
INPUT
10pF
V
OUT
1k
Ω
3V
0V
LOGIC
INPUT
10nF
V
OUT
ANALOG
INPUT 10V
FIGURE 1. t
ON
AND t
OFF
TEST CIRCUIT
FIGURE 2. CHARGE INJECTION TEST CIRCUIT
ANALOG INPUT
LOGIC
INPUT
3V
V
OUT
100
Ω
2V
P-P
AT 1MHz
51
Ω
FIGURE 3. OFF ISOLATION TEST CIRCUIT
V+
Typical Applications
Using the V
REF
Terminal
The DG201 has an internal voltage divider setting the TTL
threshold on the input control lines for V+ equal to +15V. The
schematic shown in Figure 4 with nominal resistor values,
gives approximately 2.4V on the V
REF
pin. As the TTL input
signal goes from +0.8V to +2.4V, Q
1
and Q
2
switch states to
turn the switch ON and OFF. If the power supply voltage is
less than +15V, then a resistor (R
EXT
) must be added
between V+ and the V
REF
pin, to restore +2.4V at V
REF
.
The table shows the value of this resistor for various supply
voltages, to maintain TTL compatibility. If CMOS logic levels
with a +5V supply are being used, the threshold shifts are
less critical, but a separate column of suitable values is given
in the table. For logic swings of -5V to + 5V, no resistor is
needed.
In general, the “low” logic level should be <0.8V to prevent
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