AD9271 datasheet, PDF - EEWORLD Datasheet

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AD9271: DescriptionSPECIALTY ANALOG CIRCUIT, PQFP100; Categorysemiconductor Analog mixed-signal IC; File Size2MB，60 Pages; ManufacturerADI; Websitehttps://www.analog.com

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AD9271 Overview

SPECIALTY ANALOG CIRCUIT, PQFP100

AD9271 Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	100
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	1.9 V
Minimum supply/operating voltage	1.7 V
Rated supply voltage	1.8 V
Processing package description	16 X 16 MM, ROHS COMPLIANT, MS-026AED-HD, TQFP-100
Lead-free	Yes
EU RoHS regulations	Yes
China RoHS regulations	Yes
state	ACTIVE
Craftsmanship	CMOS
packaging shape	SQUARE
Package Size	FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	0.5000 mm
terminal coating	MATTE TIN
Terminal location	QUAD
Packaging Materials	PLASTIC/EPOXY
Temperature level	INDUSTRIAL
Analog IC other types	ANALOG CIRCUIT

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Octal LNA/VGA/AAF/ADC

and Crosspoint Switch

AD9271

FEATURES

8 channels of LNA, VGA, AAF, and ADC

Low noise preamplifier (LNA)

Input-referred noise = 1.1 nV/√Hz @ 5 MHz typical,

gain = 18 dB

SPI-programmable gain = 14 dB/15.6 dB/18 dB

Single-ended input; V

maximum = 400 mV p-p/

333 mV p-p/250 mV p-p

Dual-mode active input impedance matching

Bandwidth (BW) > 70 MHz

Full-scale (FS) output = 2 V p-p differential

Variable gain amplifier (VGA)

Gain range = −6 dB to +24 dB

Linear-in-dB gain control

Antialiasing filter (AAF)

-order Butterworth cutoff

Programmable from 8 MHz to 18 MHz

Analog-to-digital converter (ADC)

12 bits at 10 MSPS to 50 MSPS

SNR = 70 dB

SFDR = 80 dB

Serial LVDS (ANSI-644, IEEE 1596.3 reduced range link)

Data and frame clock outputs

Includes crosspoint switch to support

continuous wave (CW) Doppler

Low power, 150 mW per channel at 12 bits/40 MSPS (TGC)

90 mW per channel in CW Doppler

Single 1.8 V supply (3.3 V supply for CW Doppler output bias)

Flexible power-down modes

Overload recovery in <10 ns

Fast recovery from low power standby mode, <2 μs

100-lead TQFP

FUNCTIONAL BLOCK DIAGRAM

DRVDD

PDWN

STBY

AVDD

LOSW-A

LO-A

LI-A

LG-A

LOSW-B

LO-B

LI-B

LG-B

LOSW-C

LO-C

LI-C

LG-C

LOSW-D

LO-D

LI-D

LG-D

LOSW-E

LO-E

LI-E

LG-E

LOSW-F

LO-F

LI-F

LG-F

LOSW-G

LO-G

LI-G

LG-G

LOSW-H

LO-H

LI-H

LG-H

AD9271

LNA

VGA

AAF

12-BIT

ADC

SERIAL

LVDS

DOUTA+

DOUTA–

LNA

VGA

AAF

12-BIT

ADC

SERIAL

LVDS

DOUTB+

DOUTB–

LNA

VGA

AAF

12-BIT

ADC

SERIAL

LVDS

DOUTC+

DOUTC–

LNA

VGA

AAF

12-BIT

ADC

SERIAL

LVDS

DOUTD+

DOUTD–

LNA

VGA

AAF

12-BIT

ADC

SERIAL

LVDS

DOUTE+

DOUTE–

LNA

VGA

AAF

12-BIT

ADC

SERIAL

LVDS

DOUTF+

DOUTF–

LNA

VGA

AAF

12-BIT

ADC

SERIAL

LVDS

DOUTG+

DOUTG–

LNA

VGA

AAF

12-BIT

ADC

SERIAL

LVDS

DOUTH+

DOUTH–

SERIAL

PORT

INTERFACE

DATA

RATE

MULTIPLIER

FCO+

FCO–

DCO+

DCO–

APPLICATIONS

Medical imaging/ultrasound

Automotive radar

REFERENCE

SWITCH

ARRAY

GAIN–

SENSE

VREF

REFB

REFT

RBIAS

GAIN+

CSB

SCLK

SDIO

CWVDD

The AD9271 is designed for low cost, low power, small size,

and ease of use. It contains eight channels of a variable gain amp-

lifier (VGA) with low noise preamplifier (LNA); an antialiasing

filter (AAF); and a 12-bit, 10 MSPS to 50 MSPS analog-to-digital

converter (ADC).

Each channel features a variable gain range of 30 dB, a fully

differential signal path, an active input preamplifier termination, a

maximum gain of up to 40 dB, and an ADC with a conversion

rate of up to 50 MSPS. The channel is optimized for dynamic

performance and low power in applications where a small

package size is critical.

Figure 1.

The LNA has a single-ended-to-differential gain that is selectable

through the SPI. The LNA input noise is typically 1.2 nV/√Hz,

and the combined input-referred noise of the entire channel

is 1.4 nV/√Hz at maximum gain. Assuming a 15 MHz noise

bandwidth (NBW) and a 15.6 dB LNA gain, the input SNR is

roughly 86 dB. In CW Doppler mode, the LNA output drives a

transconductance amp that is switched through an 8 × 6

differential crosspoint switch. The switch is programmable

through the SPI.

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

www.analog.com

06304-001

GENERAL DESCRIPTION

CWD[5:0]+/–

CLK+

CLK–

AD9271

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Product Highlights ........................................................................... 3

Specifications..................................................................................... 4

AC Specifications.......................................................................... 4

Digital Specifications ................................................................... 7

Switching Specifications .............................................................. 8

ADC Timing Diagrams ............................................................... 9

Absolute Maximum Ratings.......................................................... 10

Thermal Impedance ................................................................... 10

ESD Caution ................................................................................ 10

Pin Configuration and Function Descriptions ........................... 11

Equivalent Circuits ......................................................................... 14

Typical Performance Characteristics ........................................... 16

Theory of Operation ...................................................................... 20

Ultrasound................................................................................... 20

Channel Overview...................................................................... 21

Input Overdrive .......................................................................... 23

CW Doppler Operation ............................................................. 24

TGC Operation ........................................................................... 25

ADC ............................................................................................. 27

Clock Input Considerations ...................................................... 28

Serial Port Interface (SPI) .............................................................. 35

Hardware Interface..................................................................... 35

Memory Map .................................................................................. 37

Reading the Memory Map Table .............................................. 37

Reserved Locations .................................................................... 37

Default Values ............................................................................. 37

Logic Levels ................................................................................. 37

Applications Information .............................................................. 41

Design Guidelines ...................................................................... 41

Evaluation Board ............................................................................ 42

Power Supplies ............................................................................ 42

Input Signals................................................................................ 42

Output Signals ............................................................................ 42

Default Operation and Jumper Selection Settings ................. 43

Quick Start Procedure ............................................................... 44

Schematics and Artwork ........................................................... 45

Outline Dimensions ....................................................................... 58

Ordering Guide .......................................................................... 58

REVISION HISTORY

5/09—Rev. A to Rev. B

Changes to Figure 27 ...................................................................... 17

Changes to Figure 40 and Figure 41 ............................................. 21

Changes to Ordering Guide .......................................................... 58

12/07—Rev. 0 to Rev. A

Change to AC Specifications Text .................................................. 4

Added Input Noise Current ............................................................ 4

Added Noise Figure .......................................................................... 4

Changes to Signal-to-Noise Ratio Units ........................................ 4

Changes to Harmonic Distortion Units ........................................ 5

Added Endnote 3 .............................................................................. 6

Changes to Table 6 .......................................................................... 11

Inserted Figure 19 and Figure 21 .................................................. 16

Changes to Figure 20 ...................................................................... 16

Changes to Theory of Operation Section .................................... 20

Changes to Figure 40 and Figure 41 ............................................. 21

Change to Active Impedance Matching Section ........................ 22

Changes to LNA Noise Section .................................................... 22

Changes to Figure 43...................................................................... 22

Change to Input Overload Protection Section ........................... 23

Changes to TGC Operation Section ............................................ 25

Changes to Gain Control Section ................................................. 26

Changes to Figure 52...................................................................... 26

Change to Table 11 ......................................................................... 33

Changes to Serial Interface Port (SPI) Section ........................... 35

Changes to Hardware Interface Section ...................................... 35

Changes to Reading the Memory Map Table Section ............... 37

Added Applications Information and

Design Guidelines Sections ...................................................... 41

Change to Input Signals Section................................................... 42

Changes to Figure 73...................................................................... 42

Changes to Table 16 ....................................................................... 55

6/07—Revision 0: Initial Version

Rev. B | Page 2 of

AD9271 Related Products

	AD9271	AD9271-50EBZ
Description	SPECIALTY ANALOG CIRCUIT, PQFP100	SPECIALTY ANALOG CIRCUIT, PQFP100
Number of functions	1	1
Number of terminals	100	100
Maximum operating temperature	85 Cel	85 Cel
Minimum operating temperature	-40 Cel	-40 Cel
Maximum supply/operating voltage	1.9 V	1.9 V
Minimum supply/operating voltage	1.7 V	1.7 V
Rated supply voltage	1.8 V	1.8 V
Processing package description	16 X 16 MM, ROHS COMPLIANT, MS-026AED-HD, TQFP-100	16 X 16 MM, ROHS COMPLIANT, MS-026AED-HD, TQFP-100
Lead-free	Yes	Yes
EU RoHS regulations	Yes	Yes
China RoHS regulations	Yes	Yes
state	ACTIVE	ACTIVE
Craftsmanship	CMOS	CMOS
packaging shape	SQUARE	SQUARE
Package Size	FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH	FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
surface mount	Yes	Yes
Terminal form	GULL WING	GULL WING
Terminal spacing	0.5000 mm	0.5000 mm
terminal coating	MATTE TIN	MATTE TIN
Terminal location	QUAD	QUAD
Packaging Materials	PLASTIC/EPOXY	PLASTIC/EPOXY
Temperature level	INDUSTRIAL	INDUSTRIAL
Analog IC other types	ANALOG CIRCUIT	ANALOG CIRCUIT

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