SN74LS14
Schmitt Triggers
Dual Gate/Hex Inverter
The SN74LS14 contains logic gates / inverters which accept
standard TTL input signals and provide standard TTL output levels.
They are capable of transforming slowly changing input signals into
sharply defined, jitter-free output signals. Additionally, they have
greater noise margin than conventional inverters.
Each circuit contains a Schmitt trigger followed by a Darlington
level shifter and a phase splitter driving a TTL totem pole output. The
Schmitt trigger uses positive feedback to effectively speed-up slow
input transitions, and provide different input threshold voltages for
positive and negative-going transitions. This hysteresis between the
positive-going and negative-going input thresholds (typically
800 mV) is determined internally by resistor ratios and is essentially
insensitive to temperature and supply voltage variations.
LOGIC AND CONNECTION DIAGRAMS
V
CC
14
13
SN74LS14
12
11
10
9
8
14
1
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LOW
POWER
SCHOTTKY
PLASTIC
N SUFFIX
CASE 646
1
2
3
4
5
6
7
GND
14
1
GUARANTEED OPERATING RANGES
Symbol
V
CC
T
A
I
OH
I
OL
Parameter
Supply Voltage
Operating Ambient
Temperature Range
Output Current
−
High
Output Current
−
Low
Min
4.75
0
Typ
5.0
25
Max
5.25
70
−0.4
8.0
Unit
V
°C
mA
mA
SOIC
D SUFFIX
CASE 751A
ORDERING INFORMATION
Device
SN74LS14N
SN74LS14D
SN74LS14DR2
Package
14 Pin DIP
SOIC−14
SOIC−14
Shipping
2000 Units/Box
55 Units/Rail
2500/Tape & Reel
©
Semiconductor Components Industries, LLC, 2006
June, 2006
−
Rev. 2
1
Publication Order Number:
SN74LS14/D
SN74LS14
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
(unless otherwise specified)
Limits
Symbol
V
T+
V
T−
V
T+
−V
T−
V
IK
V
OH
V
OL
I
T+
I
T−
I
IH
I
IL
I
OS
Parameter
Positive-Going Threshold Voltage
Negative-Going Threshold Voltage
Hysteresis
Input Clamp Diode Voltage
Output HIGH Voltage
Output LOW Voltage
Input Current at Positive-Going Threshold
Input Current at Negative-Going Threshold
Input HIGH Current
Input LOW Current
Short Circuit Current (Note 1)
Power Supply Current
I
CC
Total, Output HIGH
12
Total, Output LOW
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
21
−20
8.6
2.7
Min
1.5
0.6
0.4
0.8
−0.65
3.4
0.25
0.35
−0.14
−0.18
1.0
20
0.1
−0.4
−100
16
mA
V
CC
= MAX
0.4
0.5
−1.5
Typ
Max
2.0
1.1
Unit
V
V
V
V
V
V
V
mA
mA
μA
mA
mA
mA
Test Conditions
V
CC
= 5.0 V
V
CC
= 5.0 V
V
CC
= 5.0 V
V
CC
= MIN, I
IN
=
−
18 mA
V
CC
= MIN, I
OH
=
−
400
μA,
V
IN
= V
IL
V
CC
= MIN, I
OL
= 4.0 mA, V
IN
= 2.0 V
V
CC
= MIN, I
OL
= 8.0 mA, V
IN
= 2.0 V
V
CC
= 5.0 V, V
IN
= V
T+
V
CC
= 5.0 V, V
IN
= V
T−
V
CC
= MAX, V
IN
= 2.7 V
V
CC
= MAX, V
IN
= 7.0 V
V
CC
= MAX, V
IN
= 0.4 V
V
CC
= MAX, V
OUT
= 0 V
AC CHARACTERISTICS
(T
A
= 25°C)
Symbol
t
PLH
t
PHL
Parameter
Propagation Delay, Input to Output
Propagation Delay, Input to Output
Max
22
22
Unit
ns
ns
Test Conditions
V
CC
= 5.0 V
C
L
= 15 pF
3V
V
IN
0V
t
PHL
V
OUT
1.3 V
1.6 V
0.8 V
t
PLH
1.3 V
Figure 1. AC Waveforms
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2
SN74LS14
5
V O , OUTPUT VOLTAGE (VOLTS)
4
V
CC
= 5 V
T
A
= 25°C
2
V T , THRESHOLD VOLTAGE (VOLTS)
Δ
V T, HYSTERESIS (VOLTS)
1.6
1.2
V
T−
DV
T
0.8
0.4
0
4.5
T
A
= 25°C
V
T+
3
2
1
0
0
0.4
0.95
1.2
V
IN
, INPUT VOLTAGE (VOLTS)
1.8
2
4.75
5
5.25
V
CC
, POWER SUPPLY VOLTAGE (VOLTS)
5.5
Figure 2. V
IN
versus V
OUT
Transfer Function
1.9
V T , THRESHOLD VOLTAGE (VOLTS)
Δ
V T, HYSTERESIS (VOLTS)
1.7
1.5
1.3
1.1
0.9
0.7
−55
°
V
T−
V
T+
Figure 3. Threshold Voltage and Hysteresis
versus Power Supply Voltage
Δ
V
T
0° 25°
75°
T
A
, AMBIENT TEMPERATURE (°C)
125°
Figure 4. Threshold Voltage Hysteresis
versus Temperature
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3
SN74LS14
PACKAGE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751A−03
ISSUE F
−A−
14
8
−B−
1
7
P
7 PL
0.25 (0.010)
M
B
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
G
C
R
X 45
_
F
−T−
SEATING
PLANE
D
14 PL
0.25 (0.010)
M
K
T B
S
M
A
S
J
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0
_
7
_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337
0.344
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0
_
7
_
0.228
0.244
0.010
0.019
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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5
SN74LS14/D
Embedded System
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