74ACT16471DL datasheet, PDF - EEWORLD Datasheet

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74ACT16471DL: DescriptionACT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO56; Categorylogic; File Size75KB，2 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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74ACT16471DL Overview

ACT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO56

74ACT16471DL Parametric

Parameter Name	Attribute value
Maker	Texas Instruments
package instruction	SSOP,
Reach Compliance Code	unknown
Other features	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
series	ACT
JESD-30 code	R-PDSO-G56
length	18.415 mm
Logic integrated circuit type	REGISTERED BUS TRANSCEIVER
Number of digits	8
Number of functions	2
Number of ports	2
Number of terminals	56
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	INVERTED
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
Certification status	Not Qualified
Maximum seat height	2.79 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	DUAL
width	7.5 mm
Base Number Matches	1

74ACT16471DL Related Products

	74ACT16471DL	54AC16471WD	54ACT16471WD	74AC16471DL
Description	ACT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO56	AC SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDFP56	ACT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDFP56	AC SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO56
Reach Compliance Code	unknown	unknow	unknown	unknown
Other features	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
series	ACT	AC	ACT	AC
JESD-30 code	R-PDSO-G56	R-GDFP-F56	R-GDFP-F56	R-PDSO-G56
length	18.415 mm	18.288 mm	18.288 mm	18.415 mm
Logic integrated circuit type	REGISTERED BUS TRANSCEIVER	REGISTERED BUS TRANSCEIVER	REGISTERED BUS TRANSCEIVER	REGISTERED BUS TRANSCEIVER
Number of digits	8	8	8	8
Number of functions	2	2	2	2
Number of ports	2	2	2	2
Number of terminals	56	56	56	56
Maximum operating temperature	85 °C	125 °C	125 °C	85 °C
Minimum operating temperature	-40 °C	-55 °C	-55 °C	-40 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE
Output polarity	INVERTED	INVERTED	INVERTED	INVERTED
Package body material	PLASTIC/EPOXY	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	PLASTIC/EPOXY
encapsulated code	SSOP	DFP	DFP	SSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH	FLATPACK	FLATPACK	SMALL OUTLINE, SHRINK PITCH
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	2.79 mm	3.05 mm	3.05 mm	2.79 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	3 V	4.5 V	3 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	MILITARY	MILITARY	INDUSTRIAL
Terminal form	GULL WING	FLAT	FLAT	GULL WING
Terminal pitch	0.635 mm	0.635 mm	0.635 mm	0.635 mm
Terminal location	DUAL	DUAL	DUAL	DUAL
width	7.5 mm	9.652 mm	9.652 mm	7.5 mm
package instruction	SSOP,	DFP,	DFP,	-
Base Number Matches	1	1	1	-

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