EEWORLDEEWORLDEEWORLD

Part Number

Search

530SB1130M00DGR

Description
LVDS Output Clock Oscillator, 1130MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
Categoryoscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

530SB1130M00DGR Overview

LVDS Output Clock Oscillator, 1130MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530SB1130M00DGR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
package instructionROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Codeunknown
Is SamacsysN
Other featuresTAPE AND REEL
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability20%
JESD-609 codee4
Manufacturer's serial number530
Installation featuresSURFACE MOUNT
Nominal operating frequency1130 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVDS
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage2.75 V
Minimum supply voltage2.25 V
Nominal supply voltage2.5 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
Base Number Matches1
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
Electronic Engineer Written Exam Materials (Real Questions from Famous Companies + Basic Knowledge for Typical Positions) - Limited-Time Free Points Download
[align=center][font=微软雅黑][/font][/align][font=微软雅黑] [size=4]The golden March and silver April, the recruitment season is here. Xiaoguan collected some interview and written test materials at the EE Do...
高进 MCU
About MSP430F5529LP+CC2564x SPPLEDemo_Lite Experiment
After burning the SPPLEDemo_Lite protocol stack, when I open the serial port software, the messageappears. There is no response. After pressing reset, “?” appears. OpenStack does not appear and I cann...
caiyihu Microcontroller MCU
Serial port data processing
Serial port data format is AB CD EF 95. Each byte contains start and end bits, where AB CD EF is the data header, 95 is the data bit, and AB CD EF 95 is 40 bits. 0/10101011/1 0/11001101/1 0/11101111/1...
562355762 Embedded System
Has anyone used the ds2413 and ds2460 chips?
Please tell me how to use these two chips (source code C or assembly)...
acmydragon Embedded System
SigmaTel launches controller solution for color laser printers
SigmaTel Corporation today announced the launch of a complete controller solution for color laser printers and multifunction printers ( MFPs )-- STDC3000. This is a highly integrated and scalable syst...
lorant Mobile and portable
Hardware/software personnel with experience in wireless teaching product development
Hello! We are urgently looking for hardware/software personnel with experience in wireless teaching product development. It is best if they have developed wireless classroom interactive systems. The s...
jinian601 Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2832  2720  815  1823  1889  58  55  17  37  39 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号