S34ML02G200TFI500 datasheet, PDF

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S34ML02G200TFI500: DescriptionNAND Flash Nand; Categorystorage; File Size2MB，71 Pages; ManufacturerCypress Semiconductor; Environmental Compliance

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NAND Flash Nand

S34ML02G200TFI500 Parametric

Parameter Name	Attribute value
Product Attribute	Attribute Value
Manufacturer	Cypress Semiconductor
Product Category	NAND Flash
RoHS	Details
Mounting Style	SMD/SMT
Package / Case	TSOP-48
Memory Size	2 Gbit
Interface Type	Parallel
Organization	256 M x 8
Timing Type	Asynchronous
Data Bus Width	8 bit
Supply Voltage - Min	2.7 V
Supply Voltage - Max	3.6 V
Supply Current - Max	30 mA
Minimum Operating Temperature	- 40 C
Maximum Operating Temperature	+ 85 C
Packaging	Tray
Memory Type	NAND
Product	NAND Flash
Speed	25 ns
Architecture	Multiplane
Moisture Sensitive	Yes
Factory Pack Quantity	96

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S34ML01G2

S34ML02G2

S34ML04G2

1 Gb, 2 Gb, 4 Gb, 3 V, 4-bit ECC, SLC

NAND Flash Memory for Embedded

Distinctive Characteristics

■

Density

❐

1 Gb / 2 Gb / 4 Gb

Architecture

❐

Input / Output Bus Width: 8 bits / 16 bits

❐

Page size:

• ×8:

1 Gb: (2048 + 64) bytes; 64-byte spare area

2 Gb / 4 Gb: (2048 + 128) bytes; 128-byte spare area

• ×16:

1 Gb: (1024 + 32) words; 32-word spare area

2 Gb / 4 Gb (1024 + 64) words; 64-word spare area

❐

Block size: 64 Pages

• ×8:

1 Gb: 128 KB+ 4 KB

2 Gb / 4 Gb: 128 KB + 8 KB

• ×16

1 Gb: 64k + 2k words

2 Gb / 4 Gb: 64k + 4k words

❐

Plane size

• ×8

1 Gb: 1024 blocks per plane or (128 MB + 4 MB

2 Gb: 1024 blocks per plane or (128 MB + 8 MB

4 Gb: 2048 blocks per plane or (256 MB + 16 MB

• ×16

1 Gb: 1024 blocks per plane or (64M + 2M) words

2 Gb: 1024 Blocks per Plane or (64M + 4M) words

4 Gb: 2048 Blocks per Plane or (128M + 8M) words

❐

■

Device Size

• 1 Gb: 1 plane per device or 128 Mbyte

• 2 Gb: 2 planes per device or 256 Mbyte

• 4 Gb: 2 planes per device or 512 Mbyte

■

NAND Flash interface

❐

Open NAND Flash Interface (ONFI) 1.0 compliant

❐

Address, Data, and Commands multiplexed

Supply Voltage

❐

3.3-V device: V

= 2.7 V ~ 3.6 V

Security

❐

One Time Programmable (OTP) area

❐

Serial number (unique ID) (Contact factory for support)

❐

Hardware program/erase disabled during power transition

Additional features

❐

2 Gb and 4 Gb parts support Multiplane Program and Erase

commands

❐

Supports Copy Back Program

❐

2 Gb and 4 Gb parts support Multiplane Copy Back Program

❐

Supports Read Cache

Electronic signature

❐

Manufacturer ID: 01h

Operating temperature

❐

Industrial: –40 °C to 85 °C

❐

Industrial Plus: –40 °C to 105 °C

■

Performance

■

Page Read / Program

❐

Random access: 25 µs (Max)

(S34ML01G2)

❐

Random access: 30 µs (Max)

(S34ML02G2, S34ML04G2)

❐

Sequential access: 25 ns (Min)

❐

Program time / Multiplane Program time: 300 µs (Typ)

Block Erase (S34ML01G2)

❐

Block Erase time: 3 ms (Typ)

Block Erase / Multiplane Erase (S34ML02G2, S34ML04G2)

❐

Block Erase time: 3.5 ms (Typ)

Reliability

❐

100,000 Program / Erase cycles (Typ)

(with 4-bit ECC per 528 bytes (×8) or 264 words (×16))

❐

■

10 Year Data retention (Typ)

❐

For one plane structure (1-Gb density)

• Block zero is valid and will be valid for at least 1,000 pro-

gram-erase cycles with ECC

❐

For two plane structures (2-Gb and 4-Gb densities)

• Blocks zero and one are valid and will be valid for at least

1,000 program-erase cycles with ECC

■

Package options

❐

Pb-free and low halogen

❐

48-Pin TSOP 12 × 20 × 1.2 mm

❐

63-Ball BGA 9 × 11 × 1 mm

❐

67-Ball BGA 8 × 6.5 × 1 mm

(S34ML01G2, S34ML02G2)

Cypress Semiconductor Corporation

Document Number: 002-00499 Rev. *Q

•

198 Champion Court

•

San Jose

CA 95134-1709

•

408-943-2600

Revised April 13, 2018

S34ML01G2

S34ML02G2

S34ML04G2

1. General Description

The S34ML01G2, S34ML02G2, and S34ML04G2 series is offered with a 3.3-V VCC power supply, and with x8 or x16 I/O interface.

Its NAND cell provides the most cost-effective solution for the solid state mass storage market. The memory is divided into blocks

that can be erased independently so it is possible to preserve valid data while old data is erased. The page size for x8 is (2048 +

spare) bytes; for x16 (1024 + spare) words.

To extend the lifetime of NAND flash devices, the implementation of an ECC is mandatory.

The chip supports CE# don't care function. This function allows the direct download of the code from the NAND flash memory device

by a microcontroller, since the CE# transitions do not stop the read operation.

The devices have a Read Cache feature that improves the read throughput for large files. During cache reading, the devices load

the data in a cache register while the previous data is transferred to the I/O buffers to be read.

Like all other 2-kB page NAND flash devices, a program operation typically writes 2 KB (

8) or 1 kword (

16) in 300 µs and an erase

operation can typically be performed in 3 ms (S34ML01G2) on a 128-kB block (

8) or 64k-word block (

16). In addition, thanks to

multiplane architecture, it is possible to program two pages at a time (one per plane) or to erase two blocks at a time (again, one per

plane). The multiplane architecture allows program time to be reduced by 40% and erase time to be reduced by 50%.

In multiplane operations, data in the page can be read out at 25 ns cycle time per byte. The I/O pins serve as the ports for command

and address input as well as data input/output. This interface allows a reduced pin count and easy migration towards different

densities, without any rearrangement of the footprint.

Commands, Data, and Addresses are asynchronously introduced using CE#, WE#, ALE, and CLE control pins.

The on-chip Program/Erase Controller automates all read, program, and erase functions including pulse repetition, where required,

and internal verification and margining of data. A WP# pin is available to provide hardware protection against program and erase

operations.

The output pin R/B# (open drain buffer) signals the status of the device during each operation. It identifies if the program/erase/read

controller is currently active. The use of an open-drain output allows the Ready/Busy pins from several memories to connect to a

single pull-up resistor. In a system with multiple memories the

R/B# pins can be connected all together to provide a global status signal.

The Reprogram function allows the optimization of defective block management — when a Page Program operation fails the data

can be directly programmed in another page inside the same array section without the time consuming serial data insertion phase.

Multiplane Copy Back is also supported. Data read out after Copy Back Read (both for single and multiplane cases) is allowed.

In addition, Cache Program and Multiplane Cache Program operations improve the programing throughput by programing data

using the cache register.

The devices provide two innovative features: Page Reprogram and Multiplane Page Reprogram. The Page Reprogram re-programs

one page. Normally, this operation is performed after a failed Page Program operation. Similarly, the Multiplane Page Reprogram

re-programs two pages in parallel, one per plane. The first page must be in the first plane while the second page must be in the

second plane. The Multiplane Page Reprogram operation is performed after a failed Multiplane Page Program operation. The Page

Reprogram and Multiplane Page Reprogram guarantee improved performance, since data insertion can be omitted during

re-program operations.

The devices are available in the TSOP48 (12 x 20 mm) package and come with the following security features:



OTP (one time programmable) area, which is a restricted access area where sensitive data/code can be stored permanently.



Serial number (unique identifier), which allows the devices to be uniquely identified. Contact factory for support of this feature.

These security features are subject to an NDA (non-disclosure agreement) and are, therefore, not described in the datasheet. For

more details about them, contact your nearest sales office.

Document Number: 002-00499 Rev. *Q

Page 4 of 71

S34ML02G200TFI500 Related Products

	S34ML02G200TFI500	S34ML04G200BHA000	S34ML01G200TFA000	S34ML04G200TFV000	S34ML02G200TFA000	S34ML02G200BHB000
Description	NAND Flash Nand	NAND Flash Nand	NAND Flash Nand	NAND Flash Nand	NAND Flash Nand	NAND Flash Nand
Is it Rohs certified?	-	conform to	conform to	conform to	conform to	conform to
Maker	-	Cypress Semiconductor	Cypress Semiconductor	Cypress Semiconductor	Cypress Semiconductor	Cypress Semiconductor
package instruction	-	BGA-63	TSOP1,	TSOP1,	TSOP1,	BGA-63
Reach Compliance Code	-	compliant	compliant	compliant	compliant	compliant
JESD-30 code	-	R-PBGA-B63	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PBGA-B63
length	-	11 mm	18.4 mm	18.4 mm	18.4 mm	11 mm
memory density	-	4294967296 bit	1073741824 bit	4294967296 bit	2147483648 bit	2147483648 bit
Memory IC Type	-	FLASH	FLASH	FLASH	FLASH	FLASH
memory width	-	8	8	8	8	8
Humidity sensitivity level	-	3	3	-	3	3
Number of functions	-	1	1	1	1	1
Number of terminals	-	63	48	48	48	63
word count	-	536870912 words	134217728 words	536870912 words	268435456 words	268435456 words
character code	-	512000000	128000000	512000000	256000000	256000000
Operating mode	-	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	-	85 °C	85 °C	105 °C	85 °C	105 °C
Minimum operating temperature	-	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
organize	-	512MX8	128MX8	512MX8	256MX8	256MX8
Package body material	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	-	VFBGA	TSOP1	TSOP1	TSOP1	VFBGA
Package shape	-	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	-	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Parallel/Serial	-	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
Programming voltage	-	3 V	3 V	3 V	3 V	3 V
Filter level	-	AEC-Q100	AEC-Q100	-	AEC-Q100	AEC-Q100
Maximum seat height	-	1 mm	1.2 mm	1.2 mm	1.2 mm	1 mm
Maximum supply voltage (Vsup)	-	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	-	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V
Nominal supply voltage (Vsup)	-	3.3 V	3.3 V	3.3 V	3 V	3 V
surface mount	-	YES	YES	YES	YES	YES
technology	-	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	-	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	-	BALL	GULL WING	GULL WING	GULL WING	BALL
Terminal pitch	-	0.8 mm	0.5 mm	0.5 mm	0.5 mm	0.8 mm
Terminal location	-	BOTTOM	DUAL	DUAL	DUAL	BOTTOM
Maximum time at peak reflow temperature	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
type	-	SLC NAND TYPE	SLC NAND TYPE	SLC NAND TYPE	SLC NAND TYPE	SLC NAND TYPE
width	-	9 mm	12 mm	12 mm	12 mm	9 mm

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