DG401/403/405
Low-Power, High-Speed CMOS Analog Switches
Features
D
D
D
D
D
D
44-V Supply Max Rating
"15-V
Analog Signal Range
On-Resistance—r
DS(on)
: 20
W
Low Leakage—I
D(on)
: 40 pA
Fast Switching—t
ON
: 100 ns
Ultra Low Power
Requirements—P
D
: 0.35
mW
D
TTL, CMOS Compatible
D
Single Supply Capability
Benefits
D
D
D
D
Wide Dynamic Range
Low Signal Errors and Distortion
Break-Before-Make Switching Action
Simple Interfacing
Applications
D
D
D
D
D
D
Audio and Video Switching
Sample-and-Hold Circuits
Battery Operation
Test Equipment
Hi-Rel Systems
PBX, PABX
Description
The DG401/403/405 monolithic analog switches were
designed to provide precision, high performance switching of
analog signals. Combining low power (0.35
mW,
typ) with
high speed (t
ON
: 100 ns, typ), the DG401 series is ideally
suited for portable and battery powered industrial and military
applications.
Built on the Siliconix proprietary high-voltage silicon-gate
process to achieve high voltage rating and superior
switch on/off performance, break-before-make is guaranteed
for the SPDT configurations. An epitaxial layer prevents
latchup.
Each switch conducts equally well in both directions when on,
and blocks up to 30 V peak-to-peak when off. On-resistance
is very flat over the full
"15-V
analog range, rivaling JFET
performance without the inherent dynamic range limitations.
The three devices in this series are differentiated by the type
of switch action as shown in the functional block diagrams.
Functional Block Diagrams and Pin Configurations
DG401
Dual-In-Line and SOIC
D
1
NC
NC
NC
NC
NC
NC
D
2
1
2
3
4
5
6
7
8
Top View
16
15
14
13
12
11
10
9
S
1
IN
1
V–
GND
V
L
V+
IN
2
S
2
NC
NC
NC
NC
NC
Key
4
5
6
7
8
9
10
11
12
13
LCC
NC D
1
NC S
1
IN
1
3
2
1
20
19
18
17
16
15
14
V–
GND
NC
V
L
V+
Two SPST Switches per Package
DG401
Truth Table
Logic
0
1
Switch
OFF
ON
Logic “0”
v
0.8 V
Logic “1”
w
2 4 V
2.4
NC D
2
NC S
2
IN
2
Top View
Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70049.
Siliconix
S-53748—Rev. E, 05-Jun-97
1
DG401/403/405
Functional Block Diagrams and Pin Configurations (Cont’d)
DG403
LCC
Key
D
3
S
3
NC
S
4
D
4
4
5
6
7
8
9
10
11 12
13
NC D
1
NC S
1
IN
1
3
2
1
20 19
18
17
16
V–
GND
NC
Two SPDT Switches per Package
16
S
1
15
IN
1
14
V–
13
GND
12
V
L
11
V+
10
IN
2
9
Top View
S
2
DG403
Dual-In-Line and SOIC
D
1
1
NC
2
D
3
S
3
S
4
D
4
3
4
5
6
Truth Table
Logic
0
1
SW
1
, SW
2
OFF
ON
SW
3
, SW
4
ON
OFF
NC
7
D
2
8
15
V
L
14
V+
Logic “0”
v
0.8 V
1
Logic “1”
w
2.4 V
NC D
2
NC S
2
IN
2
Top View
DG405
Dual-In-Line and SOIC
D
1
NC
D
3
S
3
S
4
D
4
NC
D
2
1
2
3
4
5
6
7
8
Top View
16
S
1
15
IN
1
14
V–
13
GND
12
V
L
11
V+
10
IN
2
9
S
2
D
3
S
3
NC
S
4
D
4
Key
4
5
6
7
8
9
3
2
DG405
LCC
NC D
1
NC S
1
IN
1
1
20 19
18
17
16
15
14
10
11 12
Top View
13
V–
GND
NC
V
L
V+
Two DPST Switches per Package
Truth Table
Logic
0
1
Switch
OFF
ON
Logic “0”
v
0.8 V
1
Logic “1”
w
2.4 V
NC D
2
NC S
2
IN
2
2
Siliconix
S-53748—Rev. E, 05-Jun-97
DG401/403/405
Ordering Information
Temp Range
DG401
–40 to 85_C
16-Pin Plastic DIP
16-Pin CerDIP
LCC-20
DG401DJ
DG401AK
DG401AK/883
DG401AZ/883
Package
Part Number
–55 to 125_C
DG403
–40 to 85_C
16-Pin Plastic DIP
16-Pin Narrow SOIC
16-Pin CerDIP
LCC-20
DG403DJ
DG403DY
DG403AK
DG403AK/883
5962-8976301M2A
–55 to 125_C
DG405
–40 to 85_C
–55 to 125_C
16-Pin Plastic DIP
16-Pin Narrow SOIC
16-Pin CerDIP
LCC-20
DG405DJ
DG405DY
DG405AK/883
5962-89961012A
Absolute Maximum Ratings
V+ to V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 V
GND to V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V
V
L
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . (GND – 0.3 V) to (V+) +0.3 V
Digital Inputs
a
V
S
, V
D
. . . . . . . . . . . . . . . . . (V–) –2 V to (V+ plus 2 V)
or 30 mA, whichever occurs first
Current (Any Terminal) Continuous . . . . . . . . . . . . . . . . . . . . . . 30 mA
Current, S or D (Pulsed 1 ms 10% duty) . . . . . . . . . . . . . . . . . . 100 mA
Storage Temperature
(AK, AZ Suffix) . . . . . . . . . . –65 to 150_C
(DJ, DY Suffix) . . . . . . . . . . . –65 to 125_C
Power Dissipation (Package)
b
16-Pin Plastic DIP
c
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW
16-Pin CerDIP
d
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW
16-Pin SOIC
e
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600 mW
LCC-20
f
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW
Notes:
a. Signals on S
X
, D
X
, or IN
X
exceeding V+ or V– will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6 mW/_C above 75_C
d. Derate 12 mW/_C above 75_C
e. Derate 7.6 mW/_C above 75_C
f. Derate 13 mW/_C above 75_C
Siliconix
S-53748—Rev. E, 05-Jun-97
3
DG401/403/405
Specifications
a
Test Conditions
Unless Specified
Parameter
Analog Switch
Analog Signal Range
e
Drain-Source
On-Resistance
D
Drain-Source
On-Resistance
Switch Off
Leakage C
L k
Current
Channel On
Leakage Current
V
ANALOG
r
DS(on)
Dr
DS(on)
I
S(off)
I
D(off)
I
D(on)
I
S
= –10 mA, V
D
=
"10
V
V+ = 13.5 V, V– = –13.5 V
I
S
= –10 mA, V
D
=
"5
V, 0 V
V+ = 16.5 V, V– = –16.5 V
V+ = 16.5, V– = –16.5 V
,
V
D
=
"15.5
V, V
S
=
#15.5
V
15 5 V
15 5
V+ = 16.5 V, V– = –16.5 V
V
S
= V
D
=
"15.5
V
Full
Room
Full
Room
Full
Room
Hot
Room
Hot
Room
Hot
20
3
–0.01
–0.01
–0.04
–0.25
–20
–0.25
–20
–0.4
–40
–15
15
35
45
3
5
0.25
20
0.25
20
0.4
40
–0.5
–5
–0.5
–5
–1
–10
–15
15
45
55
3
5
0.5
5
0.5
5
1
10
nA
V
A Suffix
–55 to 125_C
D Suffix
–40 to 85_C
Symbol
V+ = 15 V, V– = –15 V
V
L
= 5 V, V
IN
= 2.4 V, 0.8 V
f
Temp
b
Typ
c
Min
d
Max
d
Min
d
Max
d
Unit
W
Digital Control
Input Current V
IN
Low
Input Current V
IN
High
I
IL
I
IH
V
IN
under test = 0.8 V
All Other = 2.4 V
V
IN
under test = 2.4 V
All Other = 0.8 V
Full
Full
0.005
0.005
–1
–1
1
1
–1
–1
1
mA
1
Dynamic Characteristics
Turn-On Time
Turn-Off Time
Break-Before-Make
Time Delay (DG403)
Charge Injection
Off Isolation Reject Ratio
Channel-to-Channel Cross-
talk
Source Off Capacitance
Drain Off Capacitance
Channel On Capacitance
t
ON
t
OFF
t
D
Q
OIRR
X
TALK
C
S(off)
C
D(off)
C
D
, C
S(on)
f = 1 MHz, V
S
= 0 V
R
L
= 300
W
, C
L
= 35 pF
p
S Fi
See Figure 2
R
L
= 300
W
, C
L
= 35 pF
C
L
= 10,000 pF
V
gen
= 0 V, R
gen
= 0
W
R
L
= 100
W
, C
L
= 5 pF
f = 1 MHz
Room
Room
Room
Room
Room
Room
Room
Room
Room
100
60
12
60
72
90
12
12
39
pF
dB
5
150
100
5
pC
150
100
ns
Power Supplies
Positive Supply Current
Negative Supply Current
Logic Supply Current
Ground Current
I+
I–
I
L
I
GND
V+ = 16.5 V, V– = –16.5 V
,
V
IN
= 0 or 5 V
Room
Full
Room
Full
Room
Full
Room
Full
0.01
–0.01
0.01
–0.01
–1
–5
–1
–5
1
5
–1
–5
1
5
–1
–5
1
5
1
5
mA
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. V
IN
= input voltage to perform proper function.
4
Siliconix
S-53748—Rev. E, 05-Jun-97
DG401/403/405
Typical Characteristics
Input Switching Threshold vs. Logic Supply Voltage
10
V+ = 15 V
V– = –15 V
T
A
= 25_C
3.5
3.0
2.5
V
IN
(V)
2.0
1.5
1.0
0.5
0
(V+) 5
(V–) –5
V
L
= 5 V
V
L
= 7 V
Input Switching Threshold vs. Supply Voltages
8
V
T
(V)
6
4
DG403
SW3, 4
2
0
0
2
4
6
8
10
12
14
16
18
20
V
L
– Logic Supply (V)
10
–10
15
–15
20
–10
25
–5
30
0
35
0
40
0
r
DS(on)
vs. V
D
and Temperature
35
r
DS(on)
– Drain-Source On-Resistance (
W
)
r
DS(on)
– Drain-Source On-Resistance (
W
)
V+ = 15 V, V– = –15 V
V
L
= 5 V
40
r
DS(on)
vs. V
D
and Power Supply Voltage
T
A
= 25_C
"6
V
30
125_C
25
85_C
20
30
"10
V
"12
V
20
"15
V
"20
V
"22
V
10
–25
–15
–5
5
15
26
25_C
0_C
15
–40_C
–55_C
10
–15
–10
–5
0
5
10
15
V
D
– Drain Voltage (V)
V
D
– Drain Voltage (V)
r
DS(on)
vs. V
D
and Power Supply Voltage
(V– = 0 V)
70
r
DS(on)
– Drain-Source On-Resistance (
W
)
T
A
= 25_C
60
7.5 V
50
40
30
20
10
0
5
10
15
20
25
V
D
– Drain Voltage (V)
10 V
12 V
15 V
20 V
22 V
Q (pC)
200
180
160
140
120
100
80
60
40
20
0
–15
Charge Injection vs. Analog Voltage
V+ = 15 V, V– = –15 V
V
L
= 5 V
C
L
= 10 k pF
1 k pF
100 pF
–10
–5
0
5
10
15
V
S
– Source Voltage (V)
Siliconix
S-53748—Rev. E, 05-Jun-97
5
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