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GS82583EQ36GK-500

Description
SRAM 1.2/1.5V 8M x 36 288M
Categorystorage   
File Size298KB,26 Pages
ManufacturerGSI Technology
Websitehttp://www.gsitechnology.com/
Environmental Compliance
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GS82583EQ36GK-500 Overview

SRAM 1.2/1.5V 8M x 36 288M

GS82583EQ36GK-500 Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerGSI Technology
Product CategorySRAM
RoHSDetails
Memory Size288 Mbit
Organization8 M x 36
Maximum Clock Frequency500 MHz
Interface TypeParallel
Supply Voltage - Max1.35 V
Supply Voltage - Min1.25 V
Minimum Operating Temperature0 C
Maximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT
Package / CaseBGA-260
PackagingTray
Memory TypeQDR-III
TypeSigmaQuad-IIIe B2
Moisture SensitiveYes
Factory Pack Quantity10
GS82583EQ18/36GK-500/450/400
260-Pin BGA
Commercial Temp
Industrial Temp
Features
8Mb x 36 and 16Mb x 18 organizations available
500 MHz maximum operating frequency
1.0 BT/s peak transaction rate (in billions per second)
72 Gb/s peak data bandwidth (in x36 devices)
Separate I/O DDR Data Buses
Non-multiplexed DDR Address Bus
Two operations - Read and Write - per clock cycle
Burst of 2 Read and Write operations
3 cycle Read Latency
1.3V nominal core voltage
1.2V, 1.3V, or 1.5V HSTL I/O interface
Configurable ODT (on-die termination)
ZQ pin for programmable driver impedance
ZT pin for programmable ODT impedance
IEEE 1149.1 JTAG-compliant Boundary Scan
260-pin, 14 mm x 22 mm, 1 mm ball pitch, 6/6 RoHS-
compliant BGA package
288Mb SigmaQuad-IIIe™
Burst of 2 SRAM
Up to 500 MHz
1.3V V
DD
1.2V, 1.3V, or 1.5V V
DDQ
Clocking and Addressing Schemes
The GS82583EQ18/36GK SigmaQuad-IIIe SRAMs are
synchronous devices. They employ three pairs of positive and
negative input clocks; one pair of master clocks, CK and CK,
and two pairs of write data clocks, KD[1:0] and KD[1:0]. All
six input clocks are single-ended; that is, each is received by a
dedicated input buffer.
CK and CK are used to latch address and control inputs, and to
control all output timing. KD[1:0] and KD[1:0] are used solely
to latch data inputs.
Each internal read and write operation in a SigmaQuad-IIIe B2
SRAM is two times wider than the device I/O bus. An input
data bus de-multiplexer is used to accumulate incoming data
before it is simultaneously written to the memory array. An
output data multiplexer is used to capture the data produced
from a single memory array read and then route it to the
appropriate output drivers as needed. Therefore, the address
field of a SigmaQuad-IIIe B2 SRAM is always one address pin
less than the advertised index depth (e.g. the 16M x 18 has 8M
addressable index).
SigmaQuad-IIIe™ Family Overview
SigmaQuad-IIIe SRAMs are the Separate I/O half of the
SigmaQuad-IIIe/SigmaDDR-IIIe family of high performance
SRAMs. Although very similar to GSI's second generation of
networking SRAMs (the SigmaQuad-II/SigmaDDR-II family),
these third generation devices offer several new features that
help enable significantly higher performance.
Parameter Synopsis
Speed Grade
-500
-450
-400
Max Operating Frequency
500 MHz
450 MHz
400 MHz
Read Latency
3 cycles
3 cycles
3 cycles
V
DD
1.25V to 1.35V
1.25V to 1.35V
1.25V to 1.35V
Rev: 1.07 12/2017
1/26
© 2014, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS82583EQ36GK-500 Related Products

GS82583EQ36GK-500 GS82583EQ18GK-500I GS82583EQ36GK-500I GS82583EQ36GK-450I GS82583EQ36GK-450 GS82583EQ36GK-400I GS82583EQ18GK-400I GS82583EQ36GK-400 GS82583EQ18GK-400
Description SRAM 1.2/1.5V 8M x 36 288M SRAM 1.2/1.5V 16M x 18 288M SRAM 1.2/1.5V 8M x 36 288M SRAM 1.2/1.5V 8M x 36 288M SRAM 1.2/1.5V 8M x 36 288M SRAM 1.2/1.5V 8M x 36 288M Static random access memory 1.2/1.5V 16M x 18 288M Static random access memory 1.2/1.5V 8M x 36 288M Static random access memory 1.2/1.5V 16M x 18 288M
Product Category SRAM SRAM SRAM SRAM SRAM SRAM static random access memory static random access memory static random access memory
Interface Type Parallel Parallel Parallel Parallel Parallel Parallel Parallel Parallel Parallel
Product Attribute Attribute Value Attribute Value Attribute Value Attribute Value Attribute Value Attribute Value - - -
Manufacturer GSI Technology GSI Technology GSI Technology GSI Technology GSI Technology GSI Technology - - -
RoHS Details Details Details Details Details Details - - -
Memory Size 288 Mbit 288 Mbit 288 Mbit 288 Mbit 288 Mbit 288 Mbit - - -
Organization 8 M x 36 16 M x 18 8 M x 36 8 M x 36 8 M x 36 8 M x 36 - - -
Maximum Clock Frequency 500 MHz 500 MHz 500 MHz 450 MHz 450 MHz 400 MHz - - -
Supply Voltage - Max 1.35 V 1.35 V 1.35 V 1.35 V 1.35 V 1.35 V - - -
Supply Voltage - Min 1.25 V 1.25 V 1.25 V 1.25 V 1.25 V 1.25 V - - -
Minimum Operating Temperature 0 C - 40 C - 40 C - 40 C 0 C - 40 C - - -
Maximum Operating Temperature + 85 C + 100 C + 100 C + 100 C + 85 C + 100 C - - -
Mounting Style SMD/SMT SMD/SMT SMD/SMT SMD/SMT SMD/SMT SMD/SMT - - -
Package / Case BGA-260 BGA-260 BGA-260 BGA-260 BGA-260 BGA-260 - - -
Packaging Tray Tray Tray Tray Tray Tray - - -
Memory Type QDR-III QDR-III QDR-III QDR-III QDR-III QDR-III - - -
Type SigmaQuad-IIIe B2 SigmaQuad-IIIe B2 SigmaQuad-IIIe B2 SigmaQuad-IIIe B2 SigmaQuad-IIIe B2 SigmaQuad-IIIe B2 - - -
Moisture Sensitive Yes Yes Yes Yes Yes Yes - - -
Factory Pack Quantity 10 10 10 10 10 10 - - -
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