ASAHI KASEI
[AK93C45B/55B/65B/75B]
AK93C45B / 55B / 65B / 75B
1K / 2K / 4K / 8Kbit Serial CMOS EEPROM
Features
ADVANCED CMOS EEPROM TECHNOLOGY
READ/WRITE NON-VOLATILE MEMORY
WIDE VCC OPERATION : VCC = 1.8V to 5.5V
AK93C45B
・・1024
bits, 64 x 16 organization
AK93C55B
・・2048
bits, 128 x 16 organization
AK93C65B
・・4096
bits, 256 x 16 organization
AK93C75B
・・8192
bits, 512 x 16 organization
SERIAL INTERFACE
- Interfaces with popular microcontrollers and standard microprocessors
LOW POWER CONSUMPTION
- 0.8µA Max. Standby
High Reliability
- Endurance
: 100K cycles
- Data Retention : 10 years
Automatic address increment (READ)
Automatic write cycle time-out with auto-ERASE
Busy/Ready status signal
Software controlled write protection
IDEAL FOR LOW DENSITY DATA STORAGE
- Low cost, space saving, 8-pin package (MSOP, SON)
DO
DATA
REGISTER
INSTRUCTION
REGISTER
16
DI
R/W AMPS
AND
AUTO ERASE
16
INSTRUCTION
DECODE,
CONTROL
AND
CLOCK
GENERATION
EEPROM
93C45B=1024bit
93C55B=2048bit
93C65B=4096bit
93C75B=8192bit
ADD.
BUFFERS
DECODER
CS
VPP SW
SK
PE
(AK93C55B/65B/75B)
VREF
VPP
GENERATOR
Block Diagram
DAM04E-02
- 1 -
2003/05
ASAHI KASEI
[AK93C45B/55B/65B/75B]
General Description
The AK93C45B/55B/65B/75B is a 1024/2048/4096/8192-bit serial CMOS EEPROM divided into
64/128/256/512 registers of 16 bits each. The AK93C45B/55B/65B/75B has 4 instructions such as
READ, WRITE, EWEN and EWDS. Those instructions control the AK93C45B/55B/65B/75B.
The AK93C45B/55B/65B/75B can operate full function under wide operating voltage range from
1.8V to 5.5V. The charge up circuit is integrated for high voltage generation that is used for write
operation.
A serial interface of AK93C45B/55B/65B/75B, consisting of chip select (CS), serial clock (SK),
data-in (DI) and data-out (DO), can easily be controlled by popular microcontrollers or standard
microprocessors. AK93C45B/55B/65B/75B takes in the write data from data input pin (DI) to a
register synchronously with rising edge of input pulse of serial clock pin (SK). And at read
operation, AK93C45B/55B/65B/75B takes out the read data from a register to data output pin (DO)
synchronously with rising edge of SK.
The DO pin is usually in high impedance state. The DO pin outputs "L" or "H" in case of data
output or Busy/Ready signal output.
Software and Hardware controlled write protection
When VCC is applied to the part, the part automatically powers up in the ERASE/WRITE Disable
state. In the ERASE/WRITE disable state, execution of WRITE instruction is disabled. Before
WRITE instruction is executed, EWEN instruction must be executed. The ERASE/WRITE enable
state continues until EWDS instruction is executed or VCC is removed from the part.
Execution of a read instruction is independent of both EWEN and EWDS instructions.
The PE is internally pulled up to VCC. If the PE is left unconnected, the part will accept WRITE,
EWEN and EWDS instructions.
・・
AK93C55B/65B/75B
Busy/Ready status signal
After a write instruction, the DO output serves as a Busy/Ready status indicator. After the falling
edge of the CS initiates the self-timed programming cycle, the DO indicates the Busy/Ready status
of the chip if the CS is brought high after a minimum of 250ns (Tcs). DO=logical "0" indicates that
programming is still in progress. DO=logical "1" indicates that the register at the address specified
in the instruction has been written with the new data pattern contained in the instruction and the part
is ready for a next instruction.
The Busy/Ready status indicator is only valid when CS is active (high). When CS is low, the DO
output goes into a high impedance state.
The Busy/Ready signal outputs until a start bit (Logic"1") of the next instruction is given to the part.
Type of Products
Model
AK93C45BH
AK93C45BL
AK93C55BH
AK93C55BL
AK93C65BH
AK93C65BL
AK93C75BH
DAM04E-02
- 2 -
Memory size
1K bits
2K bits
4K bits
8K bits
Temp. Range
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
VCC
1.8V to 5.5V
1.8V to 5.5V
1.8V to 5.5V
1.8V to 5.5V
1.8V to 5.5V
1.8V to 5.5V
1.8V to 5.5V
Package
8pin Plastic MSOP
8pin Plastic SON
8pin Plastic MSOP
8pin Plastic SON
8pin Plastic MSOP
8pin Plastic SON
8pin Plastic MSOP
2003/05
ASAHI KASEI
[AK93C45B/55B/65B/75B]
Pin Arrangement
AK93C45BH
CS
SK
DI
DO
1
2
3
4
8
7
6
5
VCC
NC
NC
GND
AK93C55BH/65BH/75BH
CS
SK
DI
DO
1
2
3
4
8
7
6
5
VCC
NC
PE
GND
8pin MSOP
8pin MSOP
AK93C45BL
VCC
NC
NC
GND
1
2
3
4
8pin SON
8
7
6
5
CS
SK
DI
DO
AK93C55BL/65BL
VCC
NC
PE
GND
1
2
3
4
8pin SON
8
7
6
5
CS
SK
DI
DO
Pin Name
CS
SK
DI
DO
GND
PE
VCC
NC
Function
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Program Enable
Power Supply
Not Connected
(note) The PE is internally pulled up to VCC ( R = typ.2.5M
Ω
, VCC=5V ).
DAM04E-02
- 3 -
2003/05
ASAHI KASEI
[AK93C45B/55B/65B/75B]
Functional Description
The AK93C45B/55B/65B/75B has 4 instructions such as READ, WRITE, EWEN and EWDS. A
valid instruction consists of a Start Bit (Logic"1"), the appropriate Op Code and the desired memory
Address location.
The CS pin must be brought low for a minimum of 250ns (Tcs) between each instruction when the
instruction is continuously executed.
Instruction
READ
WRITE
EWEN
EWDS
WRAL
Start Op
Bit
Code
1
10
1
01
1
00
1
00
1
00
Address
A5-A0
A5-A0
11XXXX
00XXXX
01XXXX
Data
D15-D0
D15-D0
Writes register.
Write enable must precede all programming modes.
Disables all programming instructions.
Comments
Reads data stored in memory, at specified address.
D15-D0
Writes all registers.
X: Don't care
table1. Instruction Set for the AK93C45B
Instruction
READ
WRITE
EWEN
EWDS
WRAL
Start Op
Bit
Code
1
10
1
01
1
00
1
00
1
00
Address
X A6-A0
X A6-A0
11XXXXXX
00XXXXXX
01XXXXXX
Data
D15-D0
D15-D0
Writes register.
Write enable must precede all programming modes.
Disables all programming instructions.
Comments
Reads data stored in memory, at specified address.
D15-D0
Writes all registers.
X: Don't care
table2. Instruction Set for the AK93C55B
Instruction
READ
WRITE
EWEN
EWDS
WRAL
Start Op
Bit
Code
1
10
1
01
1
00
1
00
1
00
Address
A7-A0
A7-A0
11XXXXXX
00XXXXXX
01XXXXXX
Data
D15-D0
D15-D0
Writes register.
Write enable must precede all programming modes.
Disables all programming instructions.
Comments
Reads data stored in memory, at specified address.
D15-D0
Writes all registers.
X: Don't care
table3. Instruction Set for the AK93C65B
Instruction
READ
WRITE
EWEN
EWDS
WRAL
Start Op
Address
Bit
Code
1
10
X A8-A0
1
01
X A8-A0
1
00 11XXXXXXXX
1
00 00XXXXXXXX
1
00 01XXXXXXXX
Data
D15-D0
D15-D0
Writes register.
Write enable must precede all programming modes.
Disables all programming instructions.
Comments
Reads data stored in memory, at specified address.
D15-D0
Writes all registers.
X: Don't care
table4. Instruction Set for the AK93C75B
(Note)
The WRAL instruction are used for factory function test only.
User can't use the WRAL instruction.
The AK93C45B/55B/65B/75B perceives the start bit in the logic"1" and also "01".
2003/05
- 4 -
DAM04E-02
ASAHI KASEI
[AK93C45B/55B/65B/75B]
WRITE
The write instruction is followed by 16 bits of data to be written into the specified address. After the
last bit of data is put on the DI pin, the CS pin must be brought low before the next rising edge of the
SK clock. This falling edge of the CS initiates the self-timed programming cycle. The DO
indicates the Busy/Ready status of the chip if the CS is brought high after a minimum of 250ns (Tcs).
DO=logical "0" indicates that programming is still in progress. DO=logical "1" indicates that the
register at the address specified in the instruction has been written with the new data pattern
contained in the instruction and the part is ready for a next instruction.
CS
SK
DI
DO
0
0
1
1
0
2
1
3
4
A5
5
A4
8
A1
9
A0
10
D15
11
D14
23
D2
24
D1
25
D0
tCS
Start Bit
Op code
Hi-Z
Busy
Ready
tE/W
AK93C45B output a logic "1" (Ready status),
if previous instruction is WRITE.
WRITE (AK93C45B)
CS
SK
DI
DO
0
0
1
1
0
2
1
3
4
X / A7
5
A6
10
A1
11
A0
12
D15
13
D14
25
D2
26
D1
27
D0
tCS
Start Bit
Op code
Hi-Z
Busy
Ready
tE/W
X: Don't care
AK93C55B/65B output a logic "1" (Ready status),
if previous instruction is WRITE.
*Address bit A7 becomes a "don't care" for AK93C55B.
WRITE (AK93C55B/65B)
CS
SK
DI
DO
0
0
1
1
0
2
1
3
X
4
5
A8
12
A1
13
A0
14
D15
15
D14
27
D2
28
D1
29
D0
tCS
Start Bit
Op code
Hi-Z
Busy
Ready
tE/W
X: Don't care
AK93C75B output a logic "1" (Ready status),
if previous instruction is WRITE.
WRITE (AK93C75B)
DAM04E-02
- 5 -
2003/05
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