MT48LC4M16A2P-7E AIT:J TR datasheet, PDF

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MT48LC4M16A2P-7E AIT:J TR: DescriptionIC DRAM 64M PARALLEL 54TSOP; Categorystorage; File Size4MB，83 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/; Environmental Compliance

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MT48LC4M16A2P-7E AIT:J TR Overview

IC DRAM 64M PARALLEL 54TSOP

MT48LC4M16A2P-7E AIT:J TR Parametric

Parameter Name	Attribute value
memory type	Volatile
memory format	DRAM
technology	SDRAM
storage	64Mb （4M x 16）
Clock frequency	143MHz
Write cycle time - words, pages	14ns
interview time	5.4ns
memory interface	in parallel
Voltage - Power	3 V ~ 3.6 V
Operating temperature	-40°C ~ 85°C（TA）
Installation type	surface mount
Package/casing	54-TSOP (0.400", 10.16mm wide)
Supplier device packaging	54-TSOP II

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64Mb: x8, x16 SDRAM

Features

SDR SDRAM

MT48LC8M8A2 – 2 Meg x 8 x 4 Banks

MT48LC4M16A2 – 1 Meg x 16 x 4 Banks

Features

• PC100- and PC133-compliant

• Fully synchronous; all signals registered on positive

edge of system clock

• Internal, pipelined operation; column address can

be changed every clock cycle

• Internal banks for hiding row access/precharge

• Programmable burst lengths: 1, 2, 4, 8, or full page

• Auto precharge, includes concurrent auto precharge

and auto refresh modes

• Self refresh mode (not available on AAT devices)

• Refresh

– 64ms, 4096-cycle refresh (15.6µs/row)

(industrial)

– 16ms, 4096-cycle refresh (3.9µs/row)

(automotive)

• LVTTL-compatible inputs and outputs

• Single 3.3V ±0.3V power supply

• AEC-Q100

• PPAP submission

• 8D response time

Options

• Configuration

– 8 Meg x 8 (2 Meg x 8 x 4 banks)

– 4 Meg x 16 (1 Meg x 16 x 4 banks)

• Write recovery (

WR)

–

WR = 2 CLK

• Plastic package – OCPL

– 54-pin TSOP II (400 mil)

– 54-pin TSOP II (400 mil) Pb-free,

RoHS-compliant

– 54-ball VFBGA 8mm x 8mm

(x16 only)

– 54-ball VFBGA 8mm x 16mm, Pb-

free, RoHS-compliant (x16 only)

• Timing – cycle time

– 6ns @ CL = 3 (x16 only)

– 7.5ns @ CL = 3 (PC133)

– 7.5ns @ CL = 2 (PC133)

• Self refresh

– Standard

– Low power

• Operating temperature range

– Industrial (–40˚C to +85˚C)

– Automotive (–40˚C to +105˚C)

• Revision

Notes:

Marking

8M8

4M16

-6A

-75

-7E

None

AIT

AAT

1. See Micron technical note TN-48-05 on

Micron's Web site.

2. Off-center parting line.

3. Contact Micron for availability.

Table 1: Key Timing Parameters

CL = CAS (READ) latency

Speed Grade

-6A

-7E

-75

-7E

-75

Clock

Frequency

167 MHz

143 MHz

133 MHz

100 MHz

Access Time

CL = 2

–

5.4ns

6ns

CL = 3

5.5ns

5.4ns

–

Setup Time

1.5ns

Hold Time

1ns

0.8ns

09005aef84942e37

64mb_ait_aat_sdr.pdf - Rev. D 6/18 EN

Products and specifications discussed herein are subject to change by Micron without notice.

Micron Technology, Inc. reserves the right to change products or specifications without notice.

64Mb: x8, x16 SDRAM

Features

Contents

Important Notes and Warnings ......................................................................................................................... 7

General Description ......................................................................................................................................... 7

Automotive Temperature .............................................................................................................................. 8

Functional Block Diagrams ............................................................................................................................... 9

Pin and Ball Assignments and Descriptions ..................................................................................................... 11

Package Dimensions ....................................................................................................................................... 14

Temperature and Thermal Impedance ............................................................................................................ 16

Electrical Specifications .................................................................................................................................. 19

Electrical Specifications – I

Parameters ........................................................................................................ 21

Electrical Specifications – AC Operating Conditions ......................................................................................... 23

Functional Description ................................................................................................................................... 27

Commands .................................................................................................................................................... 28

COMMAND INHIBIT .................................................................................................................................. 28

NO OPERATION (NOP) ............................................................................................................................... 29

LOAD MODE REGISTER (LMR) ................................................................................................................... 29

ACTIVE ...................................................................................................................................................... 29

READ ......................................................................................................................................................... 30

WRITE ....................................................................................................................................................... 31

PRECHARGE .............................................................................................................................................. 32

BURST TERMINATE ................................................................................................................................... 32

Truth Tables ................................................................................................................................................... 33

Initialization .................................................................................................................................................. 38

Mode Register ................................................................................................................................................ 40

Burst Length .............................................................................................................................................. 42

Burst Type .................................................................................................................................................. 42

CAS Latency ............................................................................................................................................... 44

Operating Mode ......................................................................................................................................... 44

Write Burst Mode ....................................................................................................................................... 44

Bank/Row Activation ...................................................................................................................................... 45

READ Operation ............................................................................................................................................. 46

WRITE Operation ........................................................................................................................................... 55

Burst Read/Single Write .............................................................................................................................. 62

PRECHARGE Operation .................................................................................................................................. 63

Auto Precharge ........................................................................................................................................... 63

AUTO REFRESH Operation ............................................................................................................................. 75

SELF REFRESH Operation ............................................................................................................................... 77

Power-Down .................................................................................................................................................. 79

Clock Suspend ............................................................................................................................................... 80

Revision History ............................................................................................................................................. 83

Rev. D – 6/18 .............................................................................................................................................. 83

Rev. C – 11/13 ............................................................................................................................................. 83

Rev. B – 3/12 ............................................................................................................................................... 83

Rev. A – 12/11 ............................................................................................................................................. 83

09005aef84942e37

64mb_ait_aat_sdr.pdf - Rev. D 6/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

64Mb: x8, x16 SDRAM

Features

List of Figures

Figure 1: 8 Meg x 8 Functional Block Diagram ................................................................................................... 9

Figure 2: 4 Meg x 16 Functional Block Diagram ............................................................................................... 10

Figure 3: 54-Pin TSOP (Top View) .................................................................................................................. 11

Figure 4: 54-Ball VFBGA x16 (Top View) ......................................................................................................... 12

Figure 5: 54-Pin Plastic TSOP (400 mil) – Package Codes TG/P ......................................................................... 14

Figure 6: 54-Ball VFBGA (8mm x 8mm) – Package Codes F4/B4 ....................................................................... 15

Figure 7: Example: Temperature Test Point Location, 54-Pin TSOP (Top View) ................................................. 17

Figure 8: Example: Temperature Test Point Location, 54-Ball VFBGA (Top View) .............................................. 18

Figure 9: ACTIVE Command .......................................................................................................................... 29

Figure 10: READ Command ........................................................................................................................... 30

Figure 11: WRITE Command ......................................................................................................................... 31

Figure 12: PRECHARGE Command ................................................................................................................ 32

Figure 13: Initialize and Load Mode Register .................................................................................................. 39

Figure 14: Mode Register Definition ............................................................................................................... 41

Figure 15: CAS Latency .................................................................................................................................. 44

Figure 16: Example: Meeting

RCD (MIN) When 2 <

RCD (MIN)/

CK < 3 .......................................................... 45

Figure 17: Consecutive READ Bursts .............................................................................................................. 47

Figure 18: Random READ Accesses ................................................................................................................ 48

Figure 19: READ-to-WRITE ............................................................................................................................ 49

Figure 20: READ-to-WRITE With Extra Clock Cycle ......................................................................................... 50

Figure 21: READ-to-PRECHARGE .................................................................................................................. 50

Figure 22: Terminating a READ Burst ............................................................................................................. 51

Figure 23: Alternating Bank Read Accesses ..................................................................................................... 52

Figure 24: READ Continuous Page Burst ......................................................................................................... 53

Figure 25: READ – DQM Operation ................................................................................................................ 54

Figure 26: WRITE Burst ................................................................................................................................. 55

Figure 27: WRITE-to-WRITE .......................................................................................................................... 56

Figure 28: Random WRITE Cycles .................................................................................................................. 57

Figure 29: WRITE-to-READ ............................................................................................................................ 57

Figure 30: WRITE-to-PRECHARGE ................................................................................................................. 58

Figure 31: Terminating a WRITE Burst ............................................................................................................ 59

Figure 32: Alternating Bank Write Accesses ..................................................................................................... 60

Figure 33: WRITE – Continuous Page Burst ..................................................................................................... 61

Figure 34: WRITE – DQM Operation ............................................................................................................... 62

Figure 35: READ With Auto Precharge Interrupted by a READ ......................................................................... 64

Figure 36: READ With Auto Precharge Interrupted by a WRITE ........................................................................ 65

Figure 37: READ With Auto Precharge ............................................................................................................ 66

Figure 38: READ Without Auto Precharge ....................................................................................................... 67

Figure 39: Single READ With Auto Precharge .................................................................................................. 68

Figure 40: Single READ Without Auto Precharge ............................................................................................. 69

Figure 41: WRITE With Auto Precharge Interrupted by a READ ........................................................................ 70

Figure 42: WRITE With Auto Precharge Interrupted by a WRITE ...................................................................... 70

Figure 43: WRITE With Auto Precharge ........................................................................................................... 71

Figure 44: WRITE Without Auto Precharge ..................................................................................................... 72

Figure 45: Single WRITE With Auto Precharge ................................................................................................. 73

Figure 46: Single WRITE Without Auto Precharge ............................................................................................ 74

Figure 47: Auto Refresh Mode ........................................................................................................................ 76

Figure 48: Self Refresh Mode .......................................................................................................................... 78

Figure 49: Power-Down Mode ........................................................................................................................ 79

Figure 50: Clock Suspend During WRITE Burst ............................................................................................... 80

09005aef84942e37

64mb_ait_aat_sdr.pdf - Rev. D 6/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

MT48LC4M16A2P-7E AIT:J TR Related Products

	MT48LC4M16A2P-7E AIT:J TR	MT48LC4M16A2P-6A AAT:J TR	MT48LC4M16A2P-6A AIT:J TR	MT48LC4M16A2P-6A AAT:J	MT48LC4M16A2P-6A AIT:J	MT48LC4M16A2P-7E AIT:J
Description	IC DRAM 64M PARALLEL 54TSOP	IC DRAM 64M PARALLEL 54TSOP	IC DRAM 64M PARALLEL 54TSOP	IC DRAM 64M PARALLEL 54TSOP	IC DRAM 64M PARALLEL 54TSOP	IC DRAM 64M PARALLEL 54TSOP
memory type	Volatile	Volatile	Volatile	Volatile	Volatile	Volatile
memory format	DRAM	DRAM	DRAM	DRAM	DRAM	DRAM
technology	SDRAM	SDRAM	SDRAM	SDRAM	SDRAM	SDRAM
storage	64Mb （4M x 16）	64Mb （4M x 16）	64Mb （4M x 16）	64Mb （4M x 16）	64Mb （4M x 16）	64Mb （4M x 16）
Clock frequency	143MHz	167MHz	167MHz	167MHz	167MHz	143MHz
Write cycle time - words, pages	14ns	12ns	12ns	12ns	12ns	14ns
interview time	5.4ns	5.4ns	5.4ns	5.4ns	5.4ns	5.4ns
memory interface	in parallel	in parallel	in parallel	in parallel	in parallel	in parallel
Voltage - Power	3 V ~ 3.6 V	3 V ~ 3.6 V	3 V ~ 3.6 V	3 V ~ 3.6 V	3 V ~ 3.6 V	3 V ~ 3.6 V
Operating temperature	-40°C ~ 85°C（TA）	-40°C ~ 105°C（TA）	-40°C ~ 85°C（TA）	-40°C ~ 105°C（TA）	-40°C ~ 85°C（TA）	-40°C ~ 85°C（TA）
Installation type	surface mount	surface mount	surface mount	surface mount	surface mount	surface mount
Package/casing	54-TSOP (0.400", 10.16mm wide)	54-TSOP (0.400", 10.16mm wide)	54-TSOP (0.400", 10.16mm wide)	54-TSOP (0.400", 10.16mm wide)	54-TSOP (0.400", 10.16mm wide)	54-TSOP (0.400", 10.16mm wide)
Supplier device packaging	54-TSOP II	54-TSOP II	54-TSOP II	54-TSOP II	54-TSOP II	54-TSOP II

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