EEWORLDEEWORLDEEWORLD

Part Number

Search

SM2404T-6.6

Description
Cache DRAM, 4MX16, 4.5ns, CMOS, PDSO50, 0.400 INCH, TSOP2-50
Categorystorage    storage   
File Size188KB,9 Pages
ManufacturerRamtron International Corporation (Cypress Semiconductor Corporation)
Websitehttp://www.cypress.com/
Download Datasheet Parametric Compare View All

SM2404T-6.6 Overview

Cache DRAM, 4MX16, 4.5ns, CMOS, PDSO50, 0.400 INCH, TSOP2-50

SM2404T-6.6 Parametric

Parameter NameAttribute value
Parts packaging codeTSOP2
package instructionSOP,
Contacts50
Reach Compliance Codeunknown
ECCN codeEAR99
access modeFOUR BANK PAGE BURST
Maximum access time4.5 ns
Other featuresAUTO/SELF REFRESH
JESD-30 codeR-PDSO-G50
memory density67108864 bit
Memory IC TypeCACHE DRAM
memory width16
Number of functions1
Number of ports1
Number of terminals50
word count4194304 words
character code4000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize4MX16
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Certification statusNot Qualified
self refreshYES
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formGULL WING
Terminal locationDUAL
Base Number Matches1
16Mbit Enhanced SDRAM Family
4Mx4, 2Mx8, 1Mx16
Product Brief
Features
100% Pin, Function, and Timing Compatible with
JEDEC standard SDRAM
Integrated 8Kbit SRAM Row Cache
Synchronous Operation up to 150MHz
24ns Row Access Latency, 11ns Column Latency
Early Auto-Precharge
Programmable Burst Length (1, 2, 4, 8, full page)
Programmable CAS Latency (1, 2, 3)
Hidden Auto-Refresh without closing Read Pages
Low Power Suspend, Self-Refresh, and Power Down Modes
Optional No Write Transfer Mode
Single 3.3V Power Supply
Flexible V
DDQ
Supports LVTTL and 2.5V I/O
Packages: 44-pin TSOP-II (400 mils wide)
50-pin TSOP-II (400 mils wide)
Description
The Enhanced Memory Systems 16Mb enhanced
SDRAM (ESDRAM) family combines raw speed with
innovative architecture to optimize system price-
performance in high performance computer and
embedded control systems.
The ESDRAM is pin compatible with JEDEC standard
SDRAM. It is also function and timing compatible with
JEDEC standard SDRAM.
The two bank architecture combines 24ns DRAM arrays
with a 11ns SRAM row cache per bank. The ESDRAM is a
superset technology of JEDEC standard SDRAM. Its two
key functional features include early auto-precharge (close
DRAM page while burst reads are performed) and an
optional No Write Transfer mode. The ESDRAM is capable
of maintaining two open read pages and two open write
pages simultaneously via the No Write Transfer mode.
FUNCTIONAL BLOCK DIAGRAM
ADDRESS BUFFERS
ROW DECODER
BANK A
8Mbit
BANK B
8Mbit
A(11:0)
DATA LATCHES
SENSE AMPLIFIERS
SENSE AMPLIFIERS
SRAM ROW CACHE
COLUMN DECODER
SRAM ROW CACHE
COLUMN DECODER
CLK
CKE
/CS
/RAS
/CAS
/WE
DQM(1:0)
COMMAND
DECODER
and
TIMING
GENERATOR
DATA LATCHES
DQ
Product
4Mx4
2Mx8
1Mx16
Cache Size
1Kx4
512x8
256x16
The information contained herein is subject to change without notice.
Enhanced reserves the right to change or discontinue this product
without notice.
©
1999 Enhanced Memory Systems Inc.
1850 Ramtron Drive, Colorado Springs, CO 80921
Telephone
(800) 545-DRAM,
Fax
(719) 488-9095,
Web
http://www.edram.com
Rev. 2.4

SM2404T-6.6 Related Products

SM2404T-6.6 SM2403T-7.5 SM2402T-6.6 SM2403T-6.6 SM2404T-7.5 SM2402T-7.5 SM2402T-10
Description Cache DRAM, 4MX16, 4.5ns, CMOS, PDSO50, 0.400 INCH, TSOP2-50 Memory IC, 2MX8, CMOS, PDSO44, Cache DRAM, 4MX4, 4.3ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44 Cache DRAM, 8MX8, 4.5ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44 Memory IC, 1MX16, CMOS, PDSO50, Memory IC, 4MX4, CMOS, PDSO44, Memory IC, 4MX4, CMOS, PDSO44,
Parts packaging code TSOP2 TSOP2 TSOP2 TSOP2 TSOP2 TSOP2 TSOP2
package instruction SOP, TSOP, TSOP44,.46,32 SOP, TSOP2, TSOP, TSOP50,.46,32 TSOP, TSOP44,.46,32 TSOP, TSOP44,.46,32
Contacts 50 44 44 44 50 44 44
Reach Compliance Code unknown unknown unknown unknown unknown unknown unknow
access mode FOUR BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST FOUR BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST
Maximum access time 4.5 ns 4.5 ns 4.3 ns 4.5 ns 4.5 ns 4.5 ns 5 ns
Other features AUTO/SELF REFRESH AUTO/SELF REFRESH; 512 X 8 SRAM AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH; 256 X 16 SRAM AUTO/SELF REFRESH; 1K X 4 SRAM AUTO/SELF REFRESH; 1K X 4 SRAM
JESD-30 code R-PDSO-G50 R-PDSO-G44 R-PDSO-G44 R-PDSO-G44 R-PDSO-G50 R-PDSO-G44 R-PDSO-G44
memory density 67108864 bit 16777216 bit 16777216 bit 67108864 bit 16777216 bit 16777216 bit 16777216 bi
Memory IC Type CACHE DRAM CACHE DRAM CACHE DRAM CACHE DRAM CACHE DRAM CACHE DRAM CACHE DRAM
memory width 16 8 4 8 16 4 4
Number of functions 1 1 1 1 1 1 1
Number of ports 1 1 1 1 1 1 1
Number of terminals 50 44 44 44 50 44 44
word count 4194304 words 2097152 words 4194304 words 8388608 words 1048576 words 4194304 words 4194304 words
character code 4000000 2000000 4000000 8000000 1000000 4000000 4000000
Operating mode SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C
organize 4MX16 2MX8 4MX4 8MX8 1MX16 4MX4 4MX4
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP TSOP SOP TSOP2 TSOP TSOP TSOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
self refresh YES YES YES YES YES YES YES
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES YES YES YES
technology CMOS MOS CMOS CMOS MOS MOS MOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL
Maximum supply voltage (Vsup) 3.6 V 3.6 V - 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 3 V 3 V - 3 V 3 V 3 V 3 V
Is it lead-free? - Contains lead - - Contains lead Contains lead Contains lead
Is it Rohs certified? - incompatible - - incompatible incompatible incompatible
Maximum clock frequency (fCLK) - 133 MHz - - 133 MHz 133 MHz 100 MHz
I/O type - COMMON - - COMMON COMMON COMMON
interleaved burst length - 1,2,4,8 - - 1,2,4,8 1,2,4,8 1,2,4,8
JESD-609 code - e0 - - e0 e0 e0
Output characteristics - 3-STATE - - 3-STATE 3-STATE 3-STATE
Encapsulate equivalent code - TSOP44,.46,32 - - TSOP50,.46,32 TSOP44,.46,32 TSOP44,.46,32
Peak Reflow Temperature (Celsius) - NOT SPECIFIED - - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
power supply - 2.5/3.3,3.3 V - - 2.5/3.3,3.3 V 2.5/3.3,3.3 V 2.5/3.3,3.3 V
refresh cycle - 4096 - - 4096 4096 4096
Continuous burst length - 1,2,4,8,FP - - 1,2,4,8,FP 1,2,4,8,FP 1,2,4,8,FP
Maximum standby current - 0.002 A - - 0.002 A 0.002 A 0.002 A
Maximum slew rate - 0.24 mA - - 0.24 mA 0.24 mA 0.16 mA
Terminal surface - Tin/Lead (Sn/Pb) - - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal pitch - 0.8 mm - 0.8 mm 0.8 mm 0.8 mm 0.8 mm
Maximum time at peak reflow temperature - NOT SPECIFIED - - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Maker - - - Ramtron International Corporation (Cypress Semiconductor Corporation) Ramtron International Corporation (Cypress Semiconductor Corporation) Ramtron International Corporation (Cypress Semiconductor Corporation) Ramtron International Corporation (Cypress Semiconductor Corporation)
Raw-OS 0.95d+QP VC platform port
Raw-OS 0.95d+QP VC platform porting version Update date: 2012-08-20 Contributor: jorya_txj The official website download site has been updated. If you are interested in QP, you can go and try it. The ...
jorya_txj Embedded System
Recruiting hardware design interns
Recruiting hardware design interns Beijing Agricultural Information Technology Research Center is a national scientific research institution specializing in the research and development of agricultura...
silelehlv Talking about work
EEWORLD University ---- Practical production of IoT projects: drones
Practical production of IoT projects: drones : https://training.eeworld.com.cn/course/27330Introduction to IoT Development + Project Practice: Drone Project...
桂花蒸 MCU
Spartan-6 FPGA Embedded Kit Trial (V)-----Serial Port Receiver
Following the previous article, this article mainly studies the reception of the serial port. The design idea is: 1. ThePC uses the serial port assistant to send data; 2.Xilinx fpga receives data thro...
chenzhufly FPGA/CPLD
Invite you to watch the WeChat live broadcast: Outdoor lighting intelligent interconnection solutions allow TE to connect light and smart future
Statistics show that by 2020, the scale of my country's LED lighting market is expected to reach one trillion yuan, and smart, interconnected outdoor lighting will become an ideal platform for realizi...
EEWORLD社区 Robotics Development

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1045  541  1463  2735  1677  22  11  30  56  34 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号