M54HC137_04 datasheet, PDF - EEWORLD Datasheet

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M54HC137_04: DescriptionRAD-HARD 3 TO 8 LINE DECODER/LATCH (INVERTING); File Size222KB，10 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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M54HC137_04 Overview

RAD-HARD 3 TO 8 LINE DECODER/LATCH (INVERTING)

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M54HC137

RAD-HARD 3 TO 8 LINE DECODER/LATCH (INVERTING)

HIGH SPEED:

=18ns (TYP.) at V

= 6V

LOW POWER DISSIPATION:

= 2µA (MAX.) at T

=25°C

HIGH NOISE IMMUNITY:

NIH

= V

NIL

= 28% V

(MIN.)

SYMMETRICAL OUTPUT IMPEDANCE:

| = I

= 4mA (MIN)

BALANCED PROPAGATION DELAYS:

PLH

≅

PHL

WIDE OPERATING VOLTAGE RANGE:

(OPR) = 2V to 6V

PIN AND FUNCTION COMPATIBLE WITH

54 SERIES 137

SPACE GRADE-1: ESA SCC QUALIFIED

50 krad QUALIFIED, 100 krad AVAILABLE ON

REQUEST

NO SEL UNDER HIGH LET HEAVY IONS

IRRADIATION

DEVICE FULLY COMPLIANT WITH

SCC-9205-013

DILC-16

FPC-16

ORDER CODES

PACKAGE

DILC

FPC

M54HC137D

M54HC137K

M54HC137D1

M54HC137K1

DESCRIPTION

The M54HC137 is an high speed CMOS 3 TO 8

LINE DECODER/LATCH (INVERTING) fabricated

with silicon gate C

MOS technology.

This device is a 3 to 8 line decoder with latches on

the three address inputs. When GL goes from low

to high, the addresses present at the select inputs

(A, B, and C) is stored in the latches. As long as

GL remains high no address changes will be

recognized. Output enable pins G1 and G2,

control the state of the outputs independently of

the select or latch-enable inputs. All the outputs

are high unless G1 is high and G2 is low. The

54HC137 is ideally suited for the implementation

of glitch-free decoders in stored-address

application in bus oriented systems.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

PIN CONNECTION

March 2004

1/10

M54HC137_04 Related Products

	M54HC137_04	M54HC137D	M54HC137	M54HC137K	M54HC137K1	M54HC137D1
Description	RAD-HARD 3 TO 8 LINE DECODER/LATCH (INVERTING)	RAD-HARD 3 TO 8 LINE DECODER/LATCH (INVERTING)	RAD-HARD 3 TO 8 LINE DECODER/LATCH (INVERTING)	RAD-HARD 3 TO 8 LINE DECODER/LATCH (INVERTING)	RAD-HARD 3 TO 8 LINE DECODER/LATCH (INVERTING)	RAD-HARD 3 TO 8 LINE DECODER/LATCH (INVERTING)
Is it lead-free?	-	Contains lead	-	Contains lead	Contains lead	Contains lead
Is it Rohs certified?	-	incompatible	-	incompatible	incompatible	incompatible
Maker	-	STMicroelectronics	-	STMicroelectronics	STMicroelectronics	STMicroelectronics
Parts packaging code	-	DIP	-	DFP	DFP	DIP
package instruction	-	DIP, DIP16,.3	-	CERAMIC, DFP-16	CERAMIC, DFP-16	DIP, DIP16,.3
Contacts	-	16	-	16	16	16
Reach Compliance Code	-	_compli	-	_compli	_compli	_compli
ECCN code	-	EAR99	-	EAR99	EAR99	EAR99
series	-	HC/UH	-	HC/UH	HC/UH	HC/UH
Input adjustment	-	LATCHED	-	LATCHED	LATCHED	LATCHED
JESD-30 code	-	R-CDIP-T16	-	R-CDFP-F16	R-CDFP-F16	R-CDIP-T16
JESD-609 code	-	e0	-	e0	e0	e0
length	-	20.32 mm	-	9.94 mm	9.94 mm	20.32 mm
Load capacitance (CL)	-	50 pF	-	50 pF	50 pF	50 pF
Logic integrated circuit type	-	OTHER DECODER/DRIVER	-	OTHER DECODER/DRIVER	OTHER DECODER/DRIVER	OTHER DECODER/DRIVER
MaximumI(ol)	-	0.004 A	-	0.004 A	0.004 A	0.004 A
Number of functions	-	1	-	1	1	1
Number of terminals	-	16	-	16	16	16
Maximum operating temperature	-	125 °C	-	125 °C	125 °C	125 °C
Minimum operating temperature	-	-55 °C	-	-55 °C	-55 °C	-55 °C
Output polarity	-	INVERTED	-	INVERTED	INVERTED	INVERTED
Package body material	-	CERAMIC, METAL-SEALED COFIRED	-	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	-	DIP	-	DFP	DFP	DIP
Encapsulate equivalent code	-	DIP16,.3	-	FL16,.3	FL16,.3	DIP16,.3
Package shape	-	RECTANGULAR	-	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	-	IN-LINE	-	FLATPACK	FLATPACK	IN-LINE
Peak Reflow Temperature (Celsius)	-	NOT SPECIFIED	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	-	2/6 V	-	2/6 V	2/6 V	2/6 V
Prop。Delay @ Nom-Su	-	22 ns	-	22 ns	22 ns	22 ns
propagation delay (tpd)	-	110 ns	-	110 ns	110 ns	110 ns
Certification status	-	Not Qualified	-	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	-	3.83 mm	-	2.38 mm	2.38 mm	3.83 mm
Maximum supply voltage (Vsup)	-	6 V	-	6 V	6 V	6 V
Minimum supply voltage (Vsup)	-	2 V	-	2 V	2 V	2 V
Nominal supply voltage (Vsup)	-	4.5 V	-	4.5 V	4.5 V	4.5 V
surface mount	-	NO	-	YES	YES	NO
technology	-	CMOS	-	CMOS	CMOS	CMOS
Temperature level	-	MILITARY	-	MILITARY	MILITARY	MILITARY
Terminal surface	-	Tin/Lead (Sn/Pb)	-	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	-	THROUGH-HOLE	-	FLAT	FLAT	THROUGH-HOLE
Terminal pitch	-	2.54 mm	-	1.27 mm	1.27 mm	2.54 mm
Terminal location	-	DUAL	-	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	-	NOT SPECIFIED	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
total dose	-	50k Rad(Si) V	-	50k Rad(Si) V	50k Rad(Si) V	50k Rad(Si) V
width	-	7.62 mm	-	6.91 mm	6.91 mm	7.62 mm

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