IDT74FCT153AT/CT
HIGH-SPEED CMOS DUAL 4-INPUT MULTIPLEXER
EXTENDED COMMERCIAL TEMPERATURE RANGE
HIGH-SPEED CMOS
DUAL 4-INPUT
MULTIPLEXER
FEATURES:
−
−
−
−
−
−
−
−
−
−
−
Pin and function compatible to the Quality QS74FCT Family
Extended commercial range of –40°C to +85°C
CMOS power levels: <7.5mW static
Available in SOIC and QSOP packages
Undershoot clamp diodes on all inputs
True TTL input and output compatibility
Ground bounce controlled outputs
Reduced output swing of 0 to 3.5V
JEDEC-FCT spec compatible
A and C speed grades with 4.5ns t
PD
for C
I
OL
= 48mA
IDT74FCT153AT/CT
DESCRIPTION:
The IDT74FCT153T is a high-speed CMOS TTL-compatible dual 4-
input multiplexer with TTL outputs. All inputs have clamp diodes for
undershoot noise suppression. All outputs have ground bounce suppres-
sion. Outputs will not load an active bus when Vcc is removed from the
device.
FUNCTIONAL BLOCK DIAGRAM
EB
EA
S1
S0
I0A
I1A
I2A
I3A
I0B
I1B
I2B
I3B
YA
YB
EXTENDED COMMERCIAL TEMPERATURE RANGE
1
c
1999 Integrated Device Technology, Inc.
OCTOBER 1999
DSC-5230/-
IDT74FCT153AT/CT
HIGH-SPEED CMOS DUAL 4-INPUT MULTIPLEXER
EXTENDED COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
Symbol
V
TERM
Description
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Continuous Clamp Current,
V
I
< 0 or V
O
< 0
(1)
Unit
V
°C
mA
mA
mA
FCT Link
Max.
– 0.5 to +7
– 65 to +150
120
– 20
– 50
EA
S
1
I
3A
I
2A
I
1A
I
0A
YA
GND
1
2
3
4
5
6
7
8
SO16-1
SO16-7
SO16-8
16
15
14
13
12
11
10
9
V
CC
EB
S
0
I
3B
I
2B
I
1B
I
0B
YB
T
STG
I
OUT
I
IK
I
OK
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
CAPACITANCE
(T
A
= +25
O
C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
FCT Link
SOIC/ QSOP
TOP VIEW
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
Pin Names
I
0
- I
7
S
0
- S
1
EA, EB
YA, YB
I/O
I
I
I
0
Description
Data In
Select
Enable
Data Out
FUNCTION TABLE
Enable
EA
H
X
L
L
L
L
EB
X
H
L
L
L
L
S1
X
X
L
L
H
H
Select
S0
X
X
L
H
L
H
YA
L
X
I
0
A
I
1
A
I
2
A
I
3
A
YB
X
L
I
0
B
I
1
B
I
2
B
I
3
B
Function
Disable A
Disable B
S
1
- 0 = 0
S
1
- 0 = 1
S
1
- 0 = 2
S
1
- 0 = 3
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
2
IDT74FCT153AT/CT
HIGH-SPEED CMOS DUAL 4-INPUT MULTIPLEXER
EXTENDED COMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: T
A
= -40°C to +85°C, V
CC
= 5.0V ± 5%
Symbol
V
IH
V
IL
∆V
T
I
IH
I
IL
I
OS
V
IC
V
OH
V
OL
Parameter
Input HIGH Level
Input LOW Level
Input Hysteresis
Input HIGH Current
Input LOW Current
Short Circuit Current
Input Clamp Voltage
Output HIGH Voltage
Output LOW Voltage
V
CC
= Max., V
OUT
= GND
(2,3)
V
CC
= Min., I
IN
= –18mA, T
A
= 25
°
C
(3)
V
CC
= Min.
V
CC
= Min.
I
OH
= -15mA
I
OL
= 48mA
-60
—
2.4
—
—
–0.7
—
—
—
–1.2
—
0.5
mA
V
V
V
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
TLH
- V
THL
for all inputs
V
CC
= Max.
0
≤
V
IN
< Vcc
Min.
2
—
—
—
Typ.
(2)
—
—
0.2
—
Max.
—
0.8
—
±5
Unit
V
V
V
µA
NOTES:
1. Typical values are at V
CC
= 5.0V, T
A
= 25°C.
2. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
3. This parameter is guaranteed but not tested.
POWER SUPPLY CHARACTERISTICS
Symbol
I
CC
Parameter
Quiescent Power Supply Current
Test Conditions
(1)
V
CC
= Max.
freq = 0
0V
≤
V
IN
≤
0.2V or
Vcc-0.2V
≤
V
IN
≤
Vcc
V
CC
= Max.
V
IN
= 3.4V
freq = 0
(2)
V
CC
= Max.
Outputs Open and Enabled
One Bit Toggling
50% Duty Cycle
Other inputs at GND or Vcc
(3,4)
Min.
—
Max.
1.5
Unit
mA
∆I
CC
I
CCD
Supply Current TTL Inputs HIGH
—
2
mA
Supply Current per Input per MHz
—
0.25
mA/MHz
NOTES:
1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics..
2. Per TLL driven input (V
IN
= 3.4V).
3. For flip-flops, Q
CCD
is measured by switching one of the data input pins so that the output changes every clock cycle. This is a measurement of
device power consumption only and does not include power to drive load capacitance or tester capacitance. This parameter is guaranteed by
design but not tested.
4. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
3
IDT74FCT153AT/CT
HIGH-SPEED CMOS DUAL 4-INPUT MULTIPLEXER
EXTENDED COMMERCIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(1)
74FCT153AT
Symbol
t
IY
t
SY
t
OEH
t
OEL
Parameter
(2)
Propagation Delay
Ixx to Yx
Propagation Delay
Sx to Yx
Output Enable Time
Ex
to Yx
Min.
1.5
1.5
1.5
Max.
5.2
6.6
5.2
Min.
1.5
1.5
1.5
74FCT153CT
Max.
4.5
5.6
4.8
Unit
ns
ns
ns
NOTES:
1. C
LOAD
= 50pF, R
LOAD
= 500Ω unless otherwise noted.
2. Minimums guaranteed but not tested.
4
IDT74FCT153AT/CT
HIGH-SPEED CMOS DUAL 4-INPUT MULTIPLEXER
EXTENDED COMMERCIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V
CC
500
Ω
V
IN
Pulse
Generator
D.U.T.
50pF
R
T
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Open
FCT Link
7.0V
Switch
Closed
V
OUT
500
Ω
C
L
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
O ctal lin k
SET-UP, HOLD, AND RELEASE TIMES
DATA
INPUT
t
SU
TIM ING
INPUT
ASYNCHRONOUS C ONTROL
PRES ET
CLEAR
ETC.
SYNCHRO NOUS CONTRO L
PRES ET
CLEAR
CLOCK ENABLE
ETC.
t
REM
t
H
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
O ctal lin k
PULSE WIDTH
LO W -HIGH-LOW
PULSE
t
W
HIGH-LOW -HIGH
PULSE
O ctal lin k
1.5V
1.5V
t
SU
t
H
PROPAGATION DELAY
SAM E PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
PLH
OPPOSITE P HASE
INPUT TRANSITION
t
PH L
t
PH L
3V
1.5V
0V
V
OH
1.5V
V
OL
3V
1.5V
0V
O ctal lin k
ENABLE AND DISABLE TIMES
ENAB LE
DISA BLE
3V
CO NTROL
INPUT
t
PZL
OUTPUT
NO RM A LLY
LO W
SW ITCH
CLOSE D
t
PZH
OUTPUT
NO RM A LLY
HIGH
SW ITCH
OPEN
3.5V
1.5V
0.3V
t
PHZ
0.3V
1.5V
0V
0V
O ctal lin k
1.5V
t
PLZ
0V
3.5V
V
OL
V
OH
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns
5
京公网安备 11010802033920号
EEWORLD
