38C2 Group (A Version)
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
REJ03B0096-0200Z
Rev.2.00
May 28, 2004
DESCRIPTION
The 38C2 group (A version) is the 8-bit microcomputer based on the
740 family core technology.
The 38C2 (A version) group has an LCD drive control circuit, a 10-
channel A-D converter, and a serial I/O as additional functions.
The various microcomputers in the 38C2 group (A version) include
variations of internal memory size and packaging. For details, refer
to the section on part numbering.
FEATURES
qBasic
machine-language instructions ....................................... 71
qThe
minimum instruction execution time .......................... 0.40
µs
(at 10 MHz oscillation frequency)
qMemory
size
ROM ................................................................ 16 K to 60 K bytes
RAM ................................................................. 640 to 2048 bytes
qProgrammable
input/output ports ......... 51 (common to SEG: 24)
qInterrupts
................................................... 18 sources, 16 vectors
qTimers
............................................................ 8-bit
✕
4, 16-bit
✕
2
qA-D
converter ................................................. 10-bit
✕
8 channels
qSerial
I/O ........................ 8-bit
✕
2 (UART or Clock-synchronized)
qPWM
.................. 10-bit
✕
2, 16-bit
✕
1 (common to IGBT output)
qLCD
drive control circuit
Bias ................................................................................... 1/2, 1/3
Duty ........................................................................... 1/2, 1/3, 1/4
Common output .......................................................................... 4
Segment output ........................................................................ 24
qTwo
clock generating circuits
(connect to external ceramic resonator or quartz-crystal oscillator)
q
Watchdog timer ............................................................... 8-bit
✕
1
q
LED direct drive port .................................................................. 8
(average current: 15 mA, peak current: 30 mA, total current: 90 mA)
q
Power source voltage
• Mask ROM version
In frequency/2 mode ................................................... 4.5 to 5.5 V
(at 10 MHz oscillation frequency)
In frequency/2 mode ................................................... 4.0 to 5.5 V
(at 8 MHz oscillation frequency)
In frequency/4 mode ................................................... 1.8 to 5.5 V
(at 4 MHz oscillation frequency, A-D operation excluded)
In low-speed mode ..................................................... 1.8 to 5.5 V
(at 32 kHz oscillation frequency)
• Flash memory version
In frequency/2 mode ................................................... 4.5 to 5.5 V
(at 10 MHz oscillation frequency)
In frequency/2 mode ................................................... 4.0 to 5.5 V
(at 8 MHz oscillation frequency)
In frequency/4 mode ................................................... 2.5 to 5.5 V
(at 8 MHz oscillation frequency)
In low-speed mode ..................................................... 2.5 to 5.5 V
(at 32 kHz oscillation frequency)
q
Power dissipation
• In frequency/2 mode (at 8 MHz oscillation frequency, V
CC
= 5 V)
Mask ROM version ............................................................ 14 mW
Flash memory version ....................................................... 25 mW
• In low-speed mode (at 32 kHz oscillation frequency, V
CC
= 3 V)
Mask ROM version ............................................................. 24
µW
Flash memory version ...................................................... 375
µW
q
Operating temperature range ................................... – 20 to 85°C
Rev.2.00
May 28, 2004
page 1 of 100
38C2 Group (A Version)
PIN DESCRIPTION
Table 1 Pin description (1)
Pin
V
CC
, V
SS
V
REF
AV
SS
RESET
X
IN
Name
Power source
Analog reference
voltage
Analog power source
Reset input
Clock input
• GND input pin for A-D converter. Connect to V
SS
.
• Reset input pin for active “L.”
• Input and output pins for the main clock generating circuit.
• Feedback resistor is built in between X
IN
pin and X
OUT
pin.
X
OUT
Clock output
• Connect a ceramic resonator or a quartz-crystal oscillator between the X
IN
and X
OUT
pins to
set the oscillation frequency. When an external clock is used, connect the clock source to X
IN
,
and leave X
OUT
pin open.
V
L3
COM
0
–
COM
3
P0
0
/SEG
0
–
P0
3
/SEG
3
P0
4
/SEG
4
–
P0
7
/SEG
7
P1
0
/SEG
8
–
P1
7
/SEG
15
P2
0
/SEG
16
–
P2
5
/SEG
21
P2
6
/SEG
22
/V
L1
P2
7
/SEG
23
/V
L2
P3
0
/S
RDY2
P3
1
/S
CLK2
P3
2
/TxD
2
P3
3
/RxD
2
P3
4
/INT
2
P3
5
/T
XOUT
P3
6
/T
2OUT
/φ
P3
7
/CNTR
0
P4
0
/O
OUT0
/AN
0
P4
1
/O
OUT1
/AN
1
P4
2
/AN
2
–
P4
5
/AN
5
P4
6
/RTP
0
/AN
6
P4
7
/RTP
1
/AN
7
P5
0
/INT
0
P5
1
/INT
1
P5
2
/T
3OUT
/PWM
0
P5
3
/T
4OUT
/PWM
1
P5
4
/RxD
1
P5
5
/TxD
1
P5
6
/S
CLK1
P5
7
/S
RDY1
• Timer 3, Timer 4 output pins
• PWM output pins
• Serial I/O1 function pins
• Key input interrupt input pins
I/O port P5
• Real time port
function pins
• External interrupt pins
I/O port P4
• Timer X function pin
• AD converter input • Oscillation external
output pins
pins
• External interrupt pin
• Timer X, Timer 2 output pins
I/O port P3
• LCD power source
input pins
• Serial I/O2 function pins
I/O port P2
I/O port P1
I/O port P0
LCD power
source
Common output
• Input 0
≤
V
L1
≤
V
L2
≤
V
L3
≤
V
CC
voltage.
• Input 0 – V
L3
voltage to LCD.
• LCD common output pins.
• COM
2
and COM
3
are not used at 1/2 duty ratio.
• COM
3
is not used at 1/3 duty ratio.
• 8-bit I/O port.
• CMOS compatible input level.
• CMOS 3-state output structure.
• I/O direction register allows each pin to be individually
programmed as either input or output.
• Pull-up control is enabled in a bit unit.
• LCD segment
output pins
• Key input interrupt
pins
Function
• Apply voltage of 1.8 V to 5.5 V to V
CC
, and 0 V to V
SS
.
• Reference voltage input pin for A-D converter.
Function except a port function
Rev.2.00
May 28, 2004
page 4 of 100
FPGA/CPLD
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