74AHC3GU04DP datasheet, PDF - EEWORLD Datasheet

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74AHC3GU04DP: Descriptionhigh-speed Si-gate CMOS device; Categorylogic logic; File Size149KB，15 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74AHC3GU04DP Overview

high-speed Si-gate CMOS device

74AHC3GU04DP Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	SOIC
package instruction	3 MM WIDTH, PLASTIC, SOT505-2, TSSOP-8
Contacts	8
Reach Compliance Code	compli
series	AHC/VHC/H/U/V
JESD-30 code	S-PDSO-G8
JESD-609 code	e4
length	3 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	INVERTER
MaximumI(ol)	0.008 A
Humidity sensitivity level	1
Number of functions	3
Number of entries	1
Number of terminals	8
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP8,.16
Package shape	SQUARE
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260
power supply	2/5.5 V
Prop。Delay @ Nom-Su	9 ns
propagation delay (tpd)	13.5 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	1.1 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	NICKEL PALLADIUM GOLD
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	3 mm
Base Number Matches	1

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74AHC3GU04

Inverter

Rev. 04 — 7 January 2010

Product data sheet

1. General description

The 74AHC3GU04 is a high-speed Si-gate CMOS device. This device provides three

inverter gates with unbuffered outputs.

2. Features

Symmetrical output impedance

High noise immunity

ESD protection:

HBM JESD22-A114F exceeds 2 000 V

MM JESD22-A115-A exceeds 200 V

CDM JESD22-C101D exceeds 1 000 V

Low power dissipation

Balanced propagation delays

Multiple package options

Specified from

−40 °C

to +85

°C

and from

−40 °C

to +125

°C

3. Ordering information

Table 1.

Ordering information

Package

Temperature range

74AHC3GU04DP

74AHC3GU04DC

74AHC3GU04GD

−40 °C

to +125

°C

−40 °C

to +125

°C

−40 °C

to +125

°C

Name

TSSOP8

VSSOP8

XSON8U

Description

plastic thin shrink small outline package; 8 leads;

body width 3 mm; lead length 0.5 mm

Version

SOT505-2

Type number

plastic very thin shrink small outline package; 8 leads; SOT765-1

body width 2.3 mm

plastic extremely thin small outline package; no leads; SOT996-2

8 terminals; UTLP based; body 3

0.5 mm

74AHC3GU04DP Related Products

	74AHC3GU04DP	74AHC3GU04DC	74AHC3GU04	74AHC3GU04GD
Description	high-speed Si-gate CMOS device	high-speed Si-gate CMOS device	high-speed Si-gate CMOS device	high-speed Si-gate CMOS device
Is it lead-free?	Lead free	Lead free	-	Lead free
Is it Rohs certified?	conform to	conform to	-	conform to
Maker	NXP	NXP	-	NXP
Parts packaging code	SOIC	TSSOP	-	SON
package instruction	3 MM WIDTH, PLASTIC, SOT505-2, TSSOP-8	VSSOP, TSSOP8,.12,20	-	VSON, SOLCC8,.11,20
Contacts	8	8	-	8
Reach Compliance Code	compli	compli	-	compli
series	AHC/VHC/H/U/V	AHC/VHC/H/U/V	-	AHC/VHC/H/U/V
JESD-30 code	S-PDSO-G8	R-PDSO-G8	-	R-PDSO-N8
JESD-609 code	e4	e4	-	e4
length	3 mm	2.3 mm	-	3 mm
Load capacitance (CL)	50 pF	50 pF	-	50 pF
Logic integrated circuit type	INVERTER	INVERTER	-	INVERTER
MaximumI(ol)	0.008 A	0.008 A	-	0.008 A
Humidity sensitivity level	1	1	-	1
Number of functions	3	3	-	3
Number of entries	1	1	-	1
Number of terminals	8	8	-	8
Maximum operating temperature	125 °C	125 °C	-	125 °C
Minimum operating temperature	-40 °C	-40 °C	-	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY
encapsulated code	TSSOP	VSSOP	-	VSON
Encapsulate equivalent code	TSSOP8,.16	TSSOP8,.12,20	-	SOLCC8,.11,20
Package shape	SQUARE	RECTANGULAR	-	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH	-	SMALL OUTLINE, VERY THIN PROFILE
method of packing	TAPE AND REEL	TAPE AND REEL	-	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260	260	-	260
power supply	2/5.5 V	2/5.5 V	-	2/5.5 V
Prop。Delay @ Nom-Su	9 ns	9 ns	-	9 ns
propagation delay (tpd)	13.5 ns	13.5 ns	-	13.5 ns
Certification status	Not Qualified	Not Qualified	-	Not Qualified
Schmitt trigger	NO	NO	-	NO
Maximum seat height	1.1 mm	1 mm	-	0.5 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	-	5.5 V
Minimum supply voltage (Vsup)	2 V	2 V	-	2 V
Nominal supply voltage (Vsup)	5 V	5 V	-	5 V
surface mount	YES	YES	-	YES
technology	CMOS	CMOS	-	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	-	AUTOMOTIVE
Terminal surface	NICKEL PALLADIUM GOLD	Nickel/Palladium/Gold (Ni/Pd/Au)	-	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING	GULL WING	-	NO LEAD
Terminal pitch	0.65 mm	0.5 mm	-	0.5 mm
Terminal location	DUAL	DUAL	-	DUAL
Maximum time at peak reflow temperature	30	30	-	30
width	3 mm	2 mm	-	2 mm

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