74AUP1G132GF datasheet, PDF - EEWORLD Datasheet

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74AUP1G132GF: DescriptionLow-power 2-input NAND Schmitt trigger; Categorylogic logic; File Size78KB，18 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74AUP1G132GF Overview

Low-power 2-input NAND Schmitt trigger

74AUP1G132GF Parametric

Parameter Name	Attribute value
Source Url Status Check Date	2013-06-14 00:00:00
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	SON
package instruction	1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, SON-6
Contacts	6
Reach Compliance Code	compli
series	AUP/ULP/V
JESD-30 code	S-PDSO-N6
JESD-609 code	e3
length	1 mm
Load capacitance (CL)	30 pF
Logic integrated circuit type	NAND GATE
MaximumI(ol)	0.0017 A
Humidity sensitivity level	1
Number of functions	1
Number of entries	2
Number of terminals	6
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	VSON
Encapsulate equivalent code	SOLCC6,.04,14
Package shape	SQUARE
Package form	SMALL OUTLINE, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
power supply	1.2/3.3 V
Prop。Delay @ Nom-Su	27.9 ns
propagation delay (tpd)	27.9 ns
Certification status	Not Qualified
Schmitt trigger	YES
Maximum seat height	0.5 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	0.8 V
Nominal supply voltage (Vsup)	1.1 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Tin (Sn)
Terminal form	NO LEAD
Terminal pitch	0.35 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	1 mm
Base Number Matches	1

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74AUP1G132

Low-power 2-input NAND Schmitt trigger

Rev. 02 — 15 June 2009

Product data sheet

1. General description

The 74AUP1G132 provides the single 2-input NAND Schmitt trigger function which accept

standard input signals. They are capable of transforming slowly changing input signals

into sharply deﬁned, jitter-free output signals.

This device ensures a very low static and dynamic power consumption across the entire

range from 0.8 V to 3.6 V.

This device is fully speciﬁed for partial Power-down applications using I

OFF

The I

OFF

circuitry disables the output, preventing the damaging backﬂow current through

the device when it is powered down.

The inputs switch at different points for positive and negative-going signals. The difference

between the positive voltage V

T+

and the negative voltage V

T−

is deﬁned as the input

hysteresis voltage V

2. Features

Wide supply voltage range from 0.8 V to 3.6 V

High noise immunity

ESD protection:

HBM JESD22-A114E Class 3A exceeds 5000 V

MM JESD22-A115-A exceeds 200 V

CDM JESD22-C101C exceeds 1000 V

Low static power consumption; I

= 0.9

µA

(maximum)

Latch-up performance exceeds 100 mA per JESD 78 Class II

Inputs accept voltages up to 3.6 V

Low noise overshoot and undershoot < 10 % of V

OFF

circuitry provides partial Power-down mode operation

Multiple package options

Speciﬁed from

−40 °C

to +85

°C

and

−40 °C

to +125

°C

3. Applications

Wave and pulse shaper

Astable multivibrator

Monostable multivibrator.

74AUP1G132GF Related Products

	74AUP1G132GF	74AUP1G132	74AUP1G132GM	74AUP1G132GW
Description	Low-power 2-input NAND Schmitt trigger	Low-power 2-input NAND Schmitt trigger	Low-power 2-input NAND Schmitt trigger	Low-power 2-input NAND Schmitt trigger
Source Url Status Check Date	2013-06-14 00:00:00	-	2013-06-14 00:00:00	2013-06-14 00:00:00
Is it lead-free?	Lead free	-	Lead free	Lead free
Is it Rohs certified?	conform to	-	conform to	conform to
Maker	NXP	-	NXP	NXP
Parts packaging code	SON	-	SON	TSSOT
package instruction	1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, SON-6	-	1 X 1.45 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-886, SON-6	1.25 MM, PLASTIC, MO-203, SC-88A, SOT353-1, TSSOP-5
Contacts	6	-	6	5
Reach Compliance Code	compli	-	compli	compli
series	AUP/ULP/V	-	AUP/ULP/V	AUP/ULP/V
JESD-30 code	S-PDSO-N6	-	R-PDSO-N6	R-PDSO-G5
JESD-609 code	e3	-	e3	e3
length	1 mm	-	1.45 mm	2.05 mm
Load capacitance (CL)	30 pF	-	30 pF	30 pF
Logic integrated circuit type	NAND GATE	-	NAND GATE	NAND GATE
MaximumI(ol)	0.0017 A	-	0.0017 A	0.0017 A
Humidity sensitivity level	1	-	1	1
Number of functions	1	-	1	1
Number of entries	2	-	2	2
Number of terminals	6	-	6	5
Maximum operating temperature	125 °C	-	125 °C	125 °C
Minimum operating temperature	-40 °C	-	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	VSON	-	VSON	TSSOP
Encapsulate equivalent code	SOLCC6,.04,14	-	SOLCC6,.04,20	TSSOP5/6,.08
Package shape	SQUARE	-	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, VERY THIN PROFILE	-	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260	-	260	260
power supply	1.2/3.3 V	-	1.2/3.3 V	1.2/3.3 V
Prop。Delay @ Nom-Su	27.9 ns	-	27.9 ns	27.9 ns
propagation delay (tpd)	27.9 ns	-	27.9 ns	27.9 ns
Certification status	Not Qualified	-	Not Qualified	Not Qualified
Schmitt trigger	YES	-	YES	YES
Maximum seat height	0.5 mm	-	0.5 mm	1.1 mm
Maximum supply voltage (Vsup)	3.6 V	-	3.6 V	3.6 V
Minimum supply voltage (Vsup)	0.8 V	-	0.8 V	0.8 V
Nominal supply voltage (Vsup)	1.1 V	-	1.1 V	1.1 V
surface mount	YES	-	YES	YES
technology	CMOS	-	CMOS	CMOS
Temperature level	AUTOMOTIVE	-	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	Tin (Sn)	-	Tin (Sn)	Tin (Sn)
Terminal form	NO LEAD	-	NO LEAD	GULL WING
Terminal pitch	0.35 mm	-	0.5 mm	0.65 mm
Terminal location	DUAL	-	DUAL	DUAL
Maximum time at peak reflow temperature	30	-	30	30
width	1 mm	-	1 mm	1.25 mm
Base Number Matches	1	-	1	1

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