MK3732-08R datasheet, PDF - EEWORLD Datasheet

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MK3732-08R: DescriptionClock Generator, 70.656MHz, CMOS, PDSO20, 0.150 INCH, QSOP-20; CategoryThe embedded processor and controller Microcontrollers and processors; File Size59KB，4 Pages; ManufacturerIDT (Integrated Device Technology)

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MK3732-08R Overview

Clock Generator, 70.656MHz, CMOS, PDSO20, 0.150 INCH, QSOP-20

MK3732-08R Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	QSOP
package instruction	SSOP,
Contacts	20
Reach Compliance Code	not_compliant
ECCN code	EAR99
JESD-30 code	R-PDSO-G20
JESD-609 code	e0
length	8.65 mm
Humidity sensitivity level	1
Number of terminals	20
Maximum operating temperature	70 °C
Minimum operating temperature
Maximum output clock frequency	70.656 MHz
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	225
Master clock/crystal nominal frequency	24.576 MHz
Certification status	Not Qualified
Maximum seat height	1.75 mm
Maximum supply voltage	3.46 V
Minimum supply voltage	3.14 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	3.9 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER

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MK3732-08

ADSL Clock Source

Description

The MK3732-08 is a low cost, low jitter, high

performance VCXO and PLL clock synthesizer

designed to replace expensive discrete VCXOs and

multipliers. The on-chip Voltage Controlled Crystal

Oscillator (VCXO) accepts a 0 to 3.3 V input voltage to

cause the output clocks to vary by ±100 ppm. Using

ICS/MicroClock’s patented VCXO and analog/digital

Phase-Locked Loop (PLL) techniques, the device

uses an inexpensive 17.664 MHz or 24.576 MHz

pullable crystal input to produce one or two output

clocks.

ICS manufactures the largest variety of xDSL clock

synthesizers for all applications. Consult ICS to

eliminate VCXOs, crystals and oscillators from your

board.

Features

• Packaged in 20 pin SSOP (QSOP)

• Replaces a VCXO and oscillator

• Uses an inexpensive pullable crystal

• On-chip patented VCXO with pull range of

230 ppm (±115 ppm) minimum

• VCXO tuning voltage of 0 to 3.3 V

• Advanced, low power, sub-micron CMOS process

• 3.3V operating voltage

• Available in industrial temperature range

Block Diagram

VDD

GND

S2:S0

REFEN

VIN

Output

Buffer

Output

Buffer

CLK1

PLL/Clock

Synthesis

Circuitry

Voltage

Controlled

Crystal

Oscillator

CLK2

17.664 MHz

or 24.576 MHz

pullable

crystal

Output

Buffer

REF

MDS 3732-08 C

Revision 091201

Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126 • (408) 295-9800 tel • (408) 295-9818 fax • www.icst.com

MK3732-08R Related Products

	MK3732-08R	MK3732-08RITR	MK3732-08RTR
Description	Clock Generator, 70.656MHz, CMOS, PDSO20, 0.150 INCH, QSOP-20	Clock Generator, 70.656MHz, CMOS, PDSO20, 0.150 INCH, QSOP-20	Clock Generator, 70.656MHz, CMOS, PDSO20, 0.150 INCH, QSOP-20
Is it lead-free?	Contains lead	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible	incompatible
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	QSOP	QSOP	QSOP
package instruction	SSOP,	SSOP,	SSOP,
Contacts	20	20	20
Reach Compliance Code	not_compliant	not_compliant	not_compliant
ECCN code	EAR99	EAR99	EAR99
JESD-30 code	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20
JESD-609 code	e0	e0	e0
length	8.65 mm	8.65 mm	8.65 mm
Humidity sensitivity level	1	1	1
Number of terminals	20	20	20
Maximum operating temperature	70 °C	85 °C	70 °C
Maximum output clock frequency	70.656 MHz	70.656 MHz	70.656 MHz
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SSOP	SSOP	SSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	225	225	225
Master clock/crystal nominal frequency	24.576 MHz	24.576 MHz	24.576 MHz
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.75 mm	1.75 mm	1.75 mm
Maximum supply voltage	3.46 V	3.46 V	3.46 V
Minimum supply voltage	3.14 V	3.14 V	3.14 V
Nominal supply voltage	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	INDUSTRIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING	GULL WING	GULL WING
Terminal pitch	0.635 mm	0.635 mm	0.635 mm
Terminal location	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30
width	3.9 mm	3.9 mm	3.9 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER

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