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NDB6051L

Description
Power Field-Effect Transistor, 48A I(D), 50V, 0.018ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB,
CategoryDiscrete semiconductor    The transistor   
File Size64KB,6 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Download Datasheet Parametric Compare View All

NDB6051L Overview

Power Field-Effect Transistor, 48A I(D), 50V, 0.018ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB,

NDB6051L Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerFairchild
Reach Compliance Codecompliant
ECCN codeEAR99
Avalanche Energy Efficiency Rating (Eas)200 mJ
Shell connectionDRAIN
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage50 V
Maximum drain current (Abs) (ID)48 A
Maximum drain current (ID)48 A
Maximum drain-source on-resistance0.018 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JEDEC-95 codeTO-263AB
JESD-30 codeR-PSSO-G2
JESD-609 codee0
Number of components1
Number of terminals2
Operating modeENHANCEMENT MODE
Maximum operating temperature175 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)100 W
Maximum pulsed drain current (IDM)120 A
Certification statusNot Qualified
surface mountYES
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal locationSINGLE
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
November 1996
NDP6051L / NDB6051L
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These logic level N-Channel enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process has been especially tailored to minimize on-state
resistance, provide superior switching performance, and
withstand high energy pulses in the avalanche and
commutation modes. These devices are particularly suited for
low voltage applications such as automotive, DC/DC
converters, PWM motor controls, and other battery powered
circuits where fast switching, low in-line power loss, and
resistance to transients are needed.
Features
48 A, 50 V. R
DS(ON)
= 0.023
@ V
GS
= 5 V
R
DS(ON)
= 0.018
@ V
GS
= 10 V.
Low drive requirements allowing operation directly from logic
drivers. V
GS(TH)
< 2.0V.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
175°C maximum junction temperature rating.
High density cell design for extremely low R
DS(ON)
.
TO-220 and TO-263 (D
2
PAK) package for both through hole
and surface mount applications.
________________________________________________________________________________
D
G
S
Absolute Maximum Ratings
Symbol
V
DSS
V
DGR
V
GSS
I
D
Parameter
Drain-Source Voltage
T
C
= 25°C unless otherwise noted
NDP6051L
50
50
±10
±20
48
120
100
0.67
-65 to 175
NDB6051L
Units
V
V
V
Drain-Gate Voltage (R
GS
< 1 M
)
Gate-Source Voltage - Continuous
- Nonrepetitive (t
P
< 50 µs)
Drain Current
- Continuous
- Pulsed
A
P
D
Maximum Power Dissipation @ T
C
= 25°C
Derate above 25°C
W
W/°C
°C
T
J
,T
STG
Operating and Storage Temperature Range
© 1997 Fairchild Semiconductor Corporation
NDP6051L Rev.A

NDB6051L Related Products

NDB6051L NDP6051L
Description Power Field-Effect Transistor, 48A I(D), 50V, 0.018ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, Power Field-Effect Transistor, 48A I(D), 50V, 0.018ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-220AB, TO-220, 3 PIN
Is it Rohs certified? incompatible incompatible
Maker Fairchild Fairchild
Reach Compliance Code compliant unknown
ECCN code EAR99 EAR99
Avalanche Energy Efficiency Rating (Eas) 200 mJ 200 mJ
Configuration SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage 50 V 50 V
Maximum drain current (Abs) (ID) 48 A 48 A
Maximum drain current (ID) 48 A 48 A
Maximum drain-source on-resistance 0.018 Ω 0.018 Ω
FET technology METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
JEDEC-95 code TO-263AB TO-220AB
JESD-30 code R-PSSO-G2 R-PSFM-T3
JESD-609 code e0 e0
Number of components 1 1
Number of terminals 2 3
Operating mode ENHANCEMENT MODE ENHANCEMENT MODE
Maximum operating temperature 175 °C 175 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE FLANGE MOUNT
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED
Polarity/channel type N-CHANNEL N-CHANNEL
Maximum power dissipation(Abs) 100 W 100 W
Maximum pulsed drain current (IDM) 120 A 120 A
Certification status Not Qualified Not Qualified
surface mount YES NO
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form GULL WING THROUGH-HOLE
Terminal location SINGLE SINGLE
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
transistor applications SWITCHING SWITCHING
Transistor component materials SILICON SILICON
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