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5962F9666302V9A

Description
QUAD LINE DRIVER, UUC16, DIE-16
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size32KB,2 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Environmental Compliance
Related ProductsFound6parts with similar functions to 5962F9666302V9A
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5962F9666302V9A Overview

QUAD LINE DRIVER, UUC16, DIE-16

5962F9666302V9A Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerRenesas Electronics Corporation
Parts packaging codeDIE
package instructionDIE, DIE OR CHIP
Contacts16
Reach Compliance Codecompliant
ECCN codeEAR99
Differential outputYES
Number of drives4
High level input current maximum value0.000001 A
Input propertiesSTANDARD
Interface integrated circuit typeLINE DRIVER
Interface standardsEIA-422
JESD-30 codeR-XUUC-N16
JESD-609 codee4
Number of functions4
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Minimum output swing1.8 V
Output characteristics3-STATE
Package body materialUNSPECIFIED
encapsulated codeDIE
Encapsulate equivalent codeDIE OR CHIP
Package shapeRECTANGULAR
Package formUNCASED CHIP
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3 V
Certification statusNot Qualified
Maximum receive delay
Filter levelMIL-PRF-38535 Class V
Maximum supply voltage3.6 V
Minimum supply voltage3 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceGold (Au)
Terminal formNO LEAD
Terminal locationUPPER
Maximum time at peak reflow temperatureNOT SPECIFIED
total dose300k Rad(Si) V
maximum transmission delay42 ns

5962F9666302V9A Preview

HS-26CLV31RH
TM
Data Sheet
August 2000
File Number
4898
Radiation Hardened 3.3V Quad Differential
Line Driver
The Intersil HS-26CLV31RH is a radiation hardened 3.3V
quad differential line driver designed for digital data
transmission over balanced lines, in low voltage, RS-422
protocol applications. CMOS processing assures low power
consumption, high speed, and reliable operation in the most
severe radiation environments.
The HS-26CLV31RH accepts CMOS level inputs and converts
them to differential outputs. Enable pins allow several devices
to be connected to the same data source and addressed
independently. The device has unique outputs that become
high impedance when the driver is disabled or powered-down,
maintaining signal integrity in multi-driver applications.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
Detailed Electrical Specifications for these devices are
contained in SMD 5962-96663. A “hot-link” is provided
on our homepage for downloading.
www.intersil.com/spacedefense/space.htm
Features
• Electrically Screened to SMD # 5962-96663
• QML Qualified per MIL-PRF-38535 Requirements
• 1.2 Micron Radiation Hardened CMOS
- Total Dose. . . . . . . . . . . . . . . . . . . . . 300 krad(Si)(Max)
- Single Event Upset LET . . . . . . . . . . .100MeV/mg/cm
2
)
- Single Event Latch-up Immune
• Extremely Low Stand-by Current . . . . . . . . . 100µA (Max)
• Operating Supply Range . . . . . . . . . . . . . . . . 3.0V to 3.6V
• CMOS Level Inputs . . . . V
IH
> (.7)(V
DD
); V
IL
< (.3)(V
DD
)
• Differential Outputs. . . . . . . . . . . V
OH
> 1.8V; V
OL
< 0.5V
• High Impedance Outputs when Disabled or Powered
Down
• Low Output Impedance . . . . . . . . . . . . . . . . . 10Ω or Less
• Full -55
o
C to 125
o
C Military Temperature Range
Pinouts
HS1-26CLV31RH (SBDIP)
CDIP2-T16
TOP VIEW
AIN 1
AO 2
AO 3
ENABLE 4
BO 5
BO 6
BIN 7
GND 8
16 V
DD
15 DIN
14 DO
13 DO
12 ENABLE
11 CO
10 CO
9 CIN
Ordering Information
ORDERING NUMBER
5962F9666302QEC
5962F9666302QXC
5962F9666302V9A
5962F9666302VEC
5962F9666302VXC
INTERNAL
MKT. NUMBER
HS1-26CLV31RH-8
HS9-26CLV31RH-8
HS0-26CLV31RH-Q
HS1-26CLV31RH-Q
HS9-26CLV31RH-Q
TEMP.
RANGE
(
o
C)
-55 to 125
-55 to 125
25
-55 to 125
-55 to 125
-55 to 125
-55 to 125
HS1-26CLV31RH/PROTO HS1-26CLV31RH/PROTO
HS9-26CLV31RH/PROTO HS9-26CLV31RH/PROTO
Logic Diagram
ENABLE
ENABLE
DIN
CIN
BIN
AIN
HS9-26CLV31RH (FLATPACK)
CDFP4-F16
TOP VIEW
AIN
AO
AO
ENABLE
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
DIN
DO
DO
ENABLE
CO
CO
CIN
DO DO
CO CO
BO BO
AO AO
BO
BO
BIN
GND
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil and Design is a trademark of Intersil Corporation.
|
Copyright © Intersil Corporation 2000
HS-26CLV31RH
Die Characteristics
DIE DIMENSIONS:
96.5 mils x 195 mils x 21 mils
(2450 x 4950)
INTERFACE MATERIALS:
Glassivation:
Type: PSG (Phosphorus Silicon Glass)
Thickness: 8k
Å
±
1k
Å
Metallization:
Bottom: Mo/TiW
Thickness: 5800
Å
±
1kÅ
Top: AlSiCu (Top)
Thickness: 10k
Å
±
1k
Å
Substrate:
AVLSI1RA
Backside Finish:
Silicon
ASSEMBLY RELATED INFORMATION:
Substrate Potential (Powered Up):
V
DD
ADDITIONAL INFORMATION:
Worst Case Current Density:
<2.0 x 10
5
A/cm
2
Bond Pad Size:
110µm x 100µm
Metallization Mask Layout
HS-26CLV31RH
(16) V
DD
(16) V
DD
(15) DIN
(14) DO
(13) DO
(12) ENABLE
(11) CO
(10) CO
CIN (9)
(1) AIN
AO (2)
AO (3)
ENABLE (4)
BO (5)
BO (6)
BIN (7)
ND (8)
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site
www.intersil.com
2
ND (8)

5962F9666302V9A Related Products

5962F9666302V9A 5962F9666302VXC
Description QUAD LINE DRIVER, UUC16, DIE-16 QUAD LINE DRIVER, CDFP16, CERAMIC, DFP-16
Is it Rohs certified? conform to conform to
Maker Renesas Electronics Corporation Renesas Electronics Corporation
Parts packaging code DIE DFP
package instruction DIE, DIE OR CHIP DFP, FL16,.3
Contacts 16 16
Reach Compliance Code compliant compliant
ECCN code EAR99 EAR99
Differential output YES YES
Number of drives 4 4
High level input current maximum value 0.000001 A 0.000001 A
Input properties STANDARD STANDARD
Interface integrated circuit type LINE DRIVER LINE DRIVER
Interface standards EIA-422 EIA-422
JESD-30 code R-XUUC-N16 R-CDFP-F16
JESD-609 code e4 e4
Number of functions 4 4
Number of terminals 16 16
Maximum operating temperature 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C
Minimum output swing 1.8 V 1.8 V
Output characteristics 3-STATE 3-STATE
Package body material UNSPECIFIED CERAMIC, METAL-SEALED COFIRED
encapsulated code DIE DFP
Encapsulate equivalent code DIE OR CHIP FL16,.3
Package shape RECTANGULAR RECTANGULAR
Package form UNCASED CHIP FLATPACK
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED
power supply 3.3 V 3.3 V
Certification status Not Qualified Not Qualified
Filter level MIL-PRF-38535 Class V MIL-PRF-38535 Class V
Maximum supply voltage 3.6 V 3.6 V
Minimum supply voltage 3 V 3 V
Nominal supply voltage 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level MILITARY MILITARY
Terminal surface Gold (Au) Gold (Au)
Terminal form NO LEAD FLAT
Terminal location UPPER DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
total dose 300k Rad(Si) V 300k Rad(Si) V
maximum transmission delay 42 ns 42 ns

5962F9666302V9A Similar Products

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5962F9666302VEC Renesas(瑞萨电子) QUAD LINE DRIVER, CDIP16, SIDE BRAZED, CERAMIC, DIP-16
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