HYB25R288180C-653 datasheet, PDF

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HYB25R288180C-653: DescriptionRambus DRAM, 16MX18, 53ns, CMOS, PBGA62, FBGA-62; Categorystorage storage; File Size1MB，96 Pages; ManufacturerInfineon; Websitehttp://www.infineon.com/

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HYB25R288180C-653 Overview

Rambus DRAM, 16MX18, 53ns, CMOS, PBGA62, FBGA-62

HYB25R288180C-653 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Infineon
Parts packaging code	BGA
package instruction	FBGA-62
Contacts	62
Reach Compliance Code	not_compliant
ECCN code	EAR99
access mode	BLOCK ORIENTED PROTOCOL
Maximum access time	53 ns
Other features	SELF CONTAINED REFRESH
Maximum clock frequency (fCLK)	600 MHz
I/O type	COMMON
JESD-30 code	R-PBGA-B62
JESD-609 code	e0
length	11 mm
memory density	301989888 bit
Memory IC Type	RAMBUS DRAM
memory width	18
Number of functions	1
Number of ports	1
Number of terminals	62
word count	16777216 words
character code	16000000
Operating mode	SYNCHRONOUS
organize	16MX18
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TBGA
Encapsulate equivalent code	BGA66,10X13,32
Package shape	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	1.8/2.5,2.5 V
Certification status	Not Qualified
Maximum seat height	1.05 mm
self refresh	YES
Maximum supply voltage (Vsup)	2.63 V
Minimum supply voltage (Vsup)	2.37 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	10.5 mm

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Direct RDRAM

288-Mbit (512kx18x32s)

Overview

The INFINEON Direct RDRAM is a general purpose high-performance memory device suitable for

use in a broad range of applications including computer memory, graphics, video, and any other

application where high bandwidth and low latency are required.

The 288-Mbit Direct Rambus DRAMs (RDRAM



) are extremely high-speed CMOS DRAMs

organized as 16M words by 18 bits. The use of Rambus Signaling Level (RSL) technology permits

600 MHz to 800 MHz transfer rates while using conventional system and board design

technologies. Direct RDRAM devices are capable of sustained data transfers at 1.25 ns per two

bytes (10 ns per sixteen bytes).

The architecture of the Direct RDRAMs allows the highest sustained bandwidth for multiple,

simultaneous randomly addressed memory transactions. The separate control and data buses with

independent row and column control yield over 95% bus efficiency. The Direct RDRAM’s thirty-two

banks support up to four simultaneous transactions.

System oriented features for mobile, graphics and large memory systems include power

management, byte masking, and x18 organization. The two data bits in the x18 organization are

general and can be used for additional storage and bandwidth or for error correction.

Features

• Highest sustained bandwidth per DRAM device

– 1.6 GB/s sustained data transfer rate

– Separate control and data buses for maximized efficiency

– Separate row and column control buses for easy scheduling and highest performance

– 32 banks: four transactions can take place simultaneously at full bandwidth data rates

• Low latency features

– Write buffer to reduce read latency

– 3 precharge mechanisms for controller flexibility

– Interleaved transactions

• Advanced power management:

– Multiple low power states allows flexibility in power consumption versus time to transition to

active state

– Power-down self-refresh

• Organization: 2 Kbyte pages and 32 banks, x18

– x18 organization allows ECC configurations or increased storage/bandwidth

• Uses Rambus Signaling Level (RSL) for up to 800 MHz operation

• The ODF function is allready implemented in this device and will be described in a later version

of this document.

Data Sheet

9.01

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Description	Rambus DRAM, 16MX18, 53ns, CMOS, PBGA62, FBGA-62	Rambus DRAM, 16MX18, 45ns, CMOS, PBGA62, FBGA-62	Rambus DRAM, 16MX18, 45ns, CMOS, PBGA62, FBGA-62	Rambus DRAM, 16MX18, 53ns, CMOS, PBGA62, FBGA-62	Rambus DRAM, 16MX18, 40ns, CMOS, PBGA62, FBGA-62	Rambus DRAM, 16MX18, 45ns, CMOS, PBGA62, FBGA-62	Rambus DRAM, 16MX18, 45ns, CMOS, PBGA62, FBGA-62	Rambus DRAM, 16MX18, 40ns, CMOS, PBGA62, FBGA-62
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Parts packaging code	BGA	BGA	BGA	BGA	BGA	BGA	BGA	BGA
package instruction	FBGA-62	TBGA, BGA66,10X13,32	TBGA, BGA66,10X13,32	TBGA, BGA66,10X13,32	FBGA-62	FBGA-62	FBGA-62	FBGA-62
Contacts	62	62	62	62	62	62	62	62
Reach Compliance Code	not_compliant	unknown	unknown	unknown	not_compliant	not_compliant	not_compliant	not_compliant
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
access mode	BLOCK ORIENTED PROTOCOL	BLOCK ORIENTED PROTOCOL	BLOCK ORIENTED PROTOCOL	BLOCK ORIENTED PROTOCOL	BLOCK ORIENTED PROTOCOL	BLOCK ORIENTED PROTOCOL	BLOCK ORIENTED PROTOCOL	BLOCK ORIENTED PROTOCOL
Maximum access time	53 ns	45 ns	45 ns	53 ns	40 ns	45 ns	45 ns	40 ns
Other features	SELF CONTAINED REFRESH	SELF CONTAINED REFRESH	SELF CONTAINED REFRESH	SELF CONTAINED REFRESH	SELF CONTAINED REFRESH	SELF CONTAINED REFRESH	SELF CONTAINED REFRESH	SELF CONTAINED REFRESH
Maximum clock frequency (fCLK)	600 MHz	711 MHz	711 MHz	600 MHz	800 MHz	800 MHz	800 MHz	800 MHz
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
JESD-30 code	R-PBGA-B62	R-PBGA-B62	R-PBGA-B62	R-PBGA-B62	R-PBGA-B62	R-PBGA-B62	R-PBGA-B62	R-PBGA-B62
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0
length	11 mm	11 mm	11 mm	11 mm	11 mm	11 mm	11 mm	11 mm
memory density	301989888 bit	301989888 bit	301989888 bit	301989888 bit	301989888 bit	301989888 bit	301989888 bit	301989888 bit
Memory IC Type	RAMBUS DRAM	RAMBUS DRAM	RAMBUS DRAM	RAMBUS DRAM	RAMBUS DRAM	RAMBUS DRAM	RAMBUS DRAM	RAMBUS DRAM
memory width	18	18	18	18	18	18	18	18
Number of functions	1	1	1	1	1	1	1	1
Number of ports	1	1	1	1	1	1	1	1
Number of terminals	62	62	62	62	62	62	62	62
word count	16777216 words	16777216 words	16777216 words	16777216 words	16777216 words	16777216 words	16777216 words	16777216 words
character code	16000000	16000000	16000000	16000000	16000000	16000000	16000000	16000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
organize	16MX18	16MX18	16MX18	16MX18	16MX18	16MX18	16MX18	16MX18
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TBGA	TBGA	TBGA	TBGA	TBGA	TBGA	TBGA	TBGA
Encapsulate equivalent code	BGA66,10X13,32	BGA66,10X13,32	BGA66,10X13,32	BGA66,10X13,32	BGA66,10X13,32	BGA66,10X13,32	BGA66,10X13,32	BGA66,10X13,32
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE	GRID ARRAY, THIN PROFILE	GRID ARRAY, THIN PROFILE	GRID ARRAY, THIN PROFILE	GRID ARRAY, THIN PROFILE	GRID ARRAY, THIN PROFILE	GRID ARRAY, THIN PROFILE	GRID ARRAY, THIN PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	1.8/2.5,2.5 V	1.8/2.5,2.5 V	1.8/2.5,2.5 V	1.8/2.5,2.5 V	1.8/2.5,2.5 V	1.8/2.5,2.5 V	1.8/2.5,2.5 V	1.8/2.5,2.5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.05 mm	1.05 mm	1.05 mm	1.05 mm	1.05 mm	1.05 mm	1.05 mm	1.05 mm
self refresh	YES	YES	YES	YES	YES	YES	YES	YES
Maximum supply voltage (Vsup)	2.63 V	2.63 V	2.63 V	2.63 V	2.63 V	2.63 V	2.63 V	2.63 V
Minimum supply voltage (Vsup)	2.37 V	2.37 V	2.37 V	2.37 V	2.37 V	2.37 V	2.37 V	2.37 V
Nominal supply voltage (Vsup)	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	BALL	BALL	BALL	BALL	BALL	BALL	BALL	BALL
Terminal pitch	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	10.5 mm	10.5 mm	10.5 mm	10.5 mm	10.5 mm	10.5 mm	10.5 mm	10.5 mm
Maker	Infineon	Infineon	-	Infineon	Infineon	Infineon	Infineon	Infineon

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