®
ISL6527
Data Sheet
April 8, 2005
FN9056.7
Single Synchronous Buck Pulse-Width
Modulation (PWM) Controller
The ISL6527 makes simple work out of implementing a
complete control and protection scheme for a DC-DC
stepdown converter. Designed to drive N-Channel
MOSFETs in a synchronous buck topology, the ISL6527
integrates the control, output adjustment, monitoring and
protection functions into a single package.
The ISL6527 provides simple, single feedback loop, voltage-
mode control with fast transient response. The output voltage
can be regulated to as low as the provided external reference.
A fixed frequency oscillator reduces design complexity, while
balancing typical application cost and efficiency.
The error amplifier features a 15MHz gain-bandwidth
product and 6V/µs slew rate which enables high converter
bandwidth for fast transient performance. The resulting
PWM duty cycles range from 0% to 100%.
Protection from overcurrent conditions is provided by
monitoring the r
DS(ON)
of the upper MOSFET to inhibit PWM
operation appropriately. This approach simplifies the
implementation and improves efficiency by eliminating the
need for a current sense resistor.
Features
• Operates from 3.3V to 5V input
• Utilizes an external reference
• Drives N-Channel MOSFETs
• Simple single-loop control design
- Voltage-mode PWM control
• Fast transient response
- High-bandwidth error amplifier
- Full 0% to 100% duty cycle
• Lossless, programmable overcurrent protection
- Uses upper MOSFET’s r
DS(ON)
• Converter can source and sink current
• Small converter size
- Internal fixed frequency oscillator
- ISL6527: 300kHz
- ISL6527A: 600kHz
- Internal soft-start
- 14 Lead SOIC or 16 Lead, 5x5 QFN
• QFN Package:
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
No Leads - Package Outline
- Near Chip Scale Package footprint, which improves
PCB efficiency and has a thinner profile
• Pb-Free Available (RoHS Compliant)
Applications
• Power supplies for microprocessors
- PCs
- Embedded controllers
• Subsystem power supplies
- PCI/AGP/GTL+ busses
- ACPI power control
- DDR SDRAM bus termination supply
• Cable modems, set top boxes, and DSL modems
• DSP and core communications processor supplies
• Memory supplies
• Personal computer peripherals
• Industrial power supplies
• 3.3V-input DC-DC regulators
• Low-voltage distributed power supplies
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832
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Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003-2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL6527
Ordering Information
TEMP
PART NUMBER* RANGE (°C)
ISL6527ACB*
ISL6527ACBZ*
(Note)
ISL6527ACBZA*
(Note)
ISL6527ACR*
ISL6527ACRZ*
(Note)
ISL6527AIB*
ISL6527AIBZ*
(Note)
ISL6527AIR*
ISL6527AIRZ*
(Note)
ISL6527CB*
ISL6527CBZ*
(Note)
ISL6527CR*
ISL6527CRZ*
(Note)
ISL6527IB*
ISL6527IBZ*
(Note)
ISL6527IR*
ISL6527IRZ*
(Note)
ISL6527EVAL1
ISL6527EVAL2
ISL6527AEVAL1
ISL6527AEVAL2
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
-40 to 85
-40 to 85
-40 to 85
-40 to 85
0 to 70
0 to 70
0 to 70
0 to 70
-40 to 85
-40 to 85
-40 to 85
-40 to 85
PACKAGE
14 Ld SOIC
14 Ld SOIC
(Pb-free)
14 Ld SOIC
(Pb-free)
16 Ld 5x5 QFN
16 Ld 5x5 QFN
(Pb-free)
14 Ld SOIC
14 Ld SOIC
(Pb-free)
16 Ld 5x5 QFN
16 Ld 5x5 QFN
(Pb-free)
14 Ld SOIC
14 Ld SOIC
(Pb-free)
16 Ld 5x5 QFN
16 Ld 5x5 QFN
(Pb-free)
14 Ld SOIC
14 Ld SOIC
(Pb-free)
16 Ld 5x5 QFN
16 Ld 5x5 QFN
(Pb-free)
PKG
DWG. #
M14.15
M14.15
M14.15
L16.5x5B
L16.5x5B
M14.15
M14.15
L16.5x5B
L16.5x5B
M14.15
M14.15
L16.5x5B
L16.5x5B
M14.15
M14.15
L16.5x5B
L16.5x5B
CPVOUT 1
CT1 2
CT2 3
OCSET/SD 4
5
NC
6
FB
7
COMP
8
REF_IN
Pinouts
14 LEAD (SOIC)
TOP VIEW
GND 1
LGATE 2
CPVOUT 3
CT1 4
CT2 5
OCSET/SD 6
FB 7
14 UGATE
13 BOOT
12 PHASE
11 VCC
10 CPGND
9 REF_IN
8 COMP
16 LEAD 5X5 (QFN)
TOP VIEW
UGATE
14
LGATE
BOOT
13
12 PHASE
11 VCC
10 CPGND
9
NC
GND
15
16
ISL6527 SOIC Evaluation Board
ISL6527 QFN Evaluation Board
ISL6527A SOIC Evaluation Board
ISL6527A QFN Evaluation Board
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
*Add “-T” suffix for tape and reel.
2
FN9056.7
April 8, 2005
ISL6527
Typical Application - 3.3V Input
3.3V
V
IN
C
IN
C
BULK
OCSET/SD
R
OCSET
CPVOUT
CT2
CPGND
GND
ISL6527
BOOT
C
BOOT
UGATE
PHASE
V
REF
REF_IN
COMP
Q
1
L
OUT
D
BOOT
C
DCPL
C
HF
VCC
CT1
C
PUMP
V
OUT
LGATE
FB
Q
2
C
OUT
C
I
R
FB
R
F
C
F
R
OFFSET
3
FN9056.7
April 8, 2005
ISL6527
Typical Application - 5V Input
+5V
V
IN
VCC
CT1
OCSET/SD
R
OCSET
CPVOUT
N/C
CT2
CPGND
GND
ISL6527
BOOT
C
BOOT
UGATE
PHASE
V
REF
REF_IN
COMP
Q
1
D
BOOT
C
IN
C
BULK
CHF
L
OUT
V
OUT
LGATE
FB
Q
2
C
OUT
C
I
R
FB
R
F
C
F
R
OFFSET
Block Diagram
VCC
CPVOUT
CT1
CT2
CPGND
OCSET/SD
20µA
CHARGE
PUMP
POWER-ON
RESET (POR)
BOOT
SOFTSTART
UGATE
OC
COMPARATOR
+
-
PHASE
ERROR
AMP
+
-
PWM
COMPARATOR
+
-
INHIBIT
REF_IN
GATE
CONTROL
LOGIC
PWM
LGATE
FB
OSCILLATOR
COMP
FIXED 300kHz or 600kHz
GND
4
FN9056.7
April 8, 2005
ISL6527
Functional Pin Description
14 LEAD (SOIC)
TOP VIEW
GND 1
LGATE 2
CPVOUT 3
CT1 4
CT2 5
OCSET/SD 6
FB 7
14 UGATE
13 BOOT
12 PHASE
11 VCC
10 CPGND
9 REF_IN
8 COMP
UGATE
Connect this pin to the upper MOSFET’s gate. This pin
provides the PWM-controlled gate drive for the upper
MOSFET. This pin is also monitored by the adaptive shoot-
through protection circuitry to determine when the upper
MOSFET has turned off.
BOOT
This pin provides ground referenced bias voltage to the
upper MOSFET driver. A bootstrap circuit is used to create a
voltage suitable to drive a logic-level N-channel MOSFET.
LGATE
16 LEAD 5X5 (QFN)
TOP VIEW
UGATE
LGATE
BOOT
GND
Connect this pin to the lower MOSFET’s gate. This pin
provides the PWM-controlled gate drive for the lower
MOSFET. This pin is also monitored by the adaptive shoot-
through protection circuitry to determine when the lower
MOSFET has turned off.
16
CPVOUT 1
CT1 2
CT2 3
OCSET/SD 4
5
NC
15
14
13
12 PHASE
11 VCC
10 CPGND
9
NC
OCSET/SD
Connect a resistor (R
OCSET
) from this pin to the drain of the
upper MOSFET (V
IN
). R
OCSET
, an internal 20µA current
source (I
OCSET
), and the upper MOSFET on-resistance
(r
DS(ON)
) set the converter overcurrent (OC) trip point
according to the following equation:
I
OCSET
xR
OCSET
I
PEAK
= -------------------------------------------------
r
DS
(
ON
)
6
FB
7
COMP
8
REF_IN
An overcurrent trip cycles the soft-start function.
Pulling OCSET/SD to a voltage level below 0.8V disables
the controller. Disabling the ISL6527 causes the oscillator to
stop, the LGATE and UGATE outputs to be held low, and the
soft-start circuitry to re-arm.
VCC
This pin provides the bias supply for the ISL6527. Connect a
well-decoupled 3.3V supply to this pin.
COMP and FB
COMP and FB are two of the three available external pins of
the error amplifier. The FB pin is the inverting input of the
internal error amplifier and the COMP pin is the error
amplifier output. These pins are used to compensate the
voltage-control feedback loop of the converter.
CT1 and CT2
These pins are the connections for the external charge
pump capacitor. A minimum of a 0.1µF ceramic capacitor is
recommended for proper operation of the IC.
CPVOUT
This pin represents the output of the charge pump. The
voltage at this pin is the bias voltage for the IC. Connect a
decoupling capacitor from this pin to ground. The value of
the decoupling capacitor should be at least 10x the value of
the charge pump capacitor. This pin may be tied to the
bootstrap circuit as the source for creating the BOOT
voltage.
REF_IN
This pin is the third available external pin of the error
amplifier and represents the non-inverting input to the error
amplifier. Connect the desired reference voltage to this pin.
Voltage applied to this pin must not exceed 1.5V.
GND
This pin represents the signal and power ground for the IC.
Tie this pin to the ground island/plane through the lowest
impedance connection available.
CPGND
This pin represents the signal and power ground for the
charge pump. Tie this pin to the ground island/plane through
the lowest impedance connection available.
PHASE
Connect this pin to the upper MOSFET’s source. This pin is
used to monitor the voltage drop across the upper MOSFET
for overcurrent protection.
5
FN9056.7
April 8, 2005
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