PIC18F46J50
Data Sheet
28/44-Pin, Low-Power,
High-Performance USB Microcontrollers
with nanoWatt XLP Technology
2011 Microchip Technology Inc.
DS39931D
Note the following details of the code protection feature on Microchip devices:
•
•
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
•
•
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
K
EE
L
OQ
, K
EE
L
OQ
logo, MPLAB, PIC, PICmicro, PICSTART,
PIC
32
logo, rfPIC and UNI/O are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified
logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance,
TSHARC, UniWinDriver, WiperLock and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2011, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-61341-027-1
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC
®
MCUs and dsPIC
®
DSCs, K
EE
L
OQ
®
code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS39931D-page 2
2011 Microchip Technology Inc.
PIC18F46J50 FAMILY
28/44-Pin, Low-Power, High-Performance USB Microcontrollers
Power Management Features with
nanoWatt XLP™ for Extreme Low-Power:
• Deep Sleep mode: CPU off, Peripherals off,
Currents Down to 13 nA and 850 nA with RTCC:
- Able to wake-up on external triggers,
programmable WDT or RTCC alarm
- Ultra Low-Power Wake-up (ULPWU)
• Sleep mode: CPU off, Peripherals off, SRAM on,
Fast Wake-up, Currents Down to 105 nA, Typical
• Idle: CPU off, Peripherals on, Currents Down to
2.3
A,
Typical
• Run: CPU on, Peripherals on, Currents Down to
6.2
A,
Typical
• Timer1 Oscillator w/RTCC: 1
A,
32 kHz, Typical
• Watchdog Timer: 0.8 µA, 2V, Typical
Peripheral Highlights:
• Peripheral Pin Select:
- Allows independent I/O mapping of many
peripherals
- Continuous hardware integrity checking and
safety interlocks prevent unintentional
configuration changes
• Hardware Real-Time Clock and Calendar (RTCC):
- Provides clock, calendar and alarm functions
• High-Current Sink/Source 25 mA/25 mA
(PORTB and PORTC)
• 5.5V Tolerant Inputs (digital only pins)
• Four Programmable External Interrupts
• Four Input Change Interrupts
• Two Enhanced Capture/Compare/PWM (ECCP)
modules:
- One, two or four PWM outputs
- Selectable polarity
- Programmable dead time
- Auto-shutdown and auto-restart
- Pulse steering control
• Two Master Synchronous Serial Port (MSSP)
modules Supporting Three-Wire SPI (all four
modes) and I
2
C™ Master and Slave modes
• Full-Duplex Master/Slave SPI DMA Engine
• 8-Bit Parallel Master Port/Enhanced Parallel
Slave Port
• Two-Rail – Rail Analog Comparators with Input
Multiplexing
• 10-Bit, up to 13-Channel Analog-to-Digital (A/D)
Converter module:
- Auto-acquisition capability
- Conversion available during Sleep
- Self-calibration
• High/Low-Voltage Detect module
• Charge Time Measurement Unit (CTMU):
- Supports capacitive touch sensing for touch
screens and capacitive switches
- Provides a precise resolution time measure-
ment for both flow measurement and simple
temperature sensing
• Two Enhanced USART modules:
- Supports RS-485, RS-232 and LIN/J2602
- Auto-Wake-up on Start bit
• Auto-Baud Detect
Special Microcontroller Features:
•
•
•
•
•
•
•
•
•
•
•
Low-Power, High-Speed CMOS Flash Technology
C Compiler Optimized Architecture for Re-Entrant Code
Priority Levels for Interrupts
Self-Programmable under Software Control
8 x 8 Single-Cycle Hardware Multiplier
Extended Watchdog Timer (WDT):
- Programmable period from 4 ms to 131s
Single-Supply In-Circuit Serial Programming™
(ICSP™) via two pins
In-Circuit Debug (ICD) w/Three Breakpoints via 2 Pins
Operating Voltage Range of 2.0V to 3.6V
On-Chip 2.5V Regulator
Flash Program Memory of 10,000 Erase/Write
Cycles Minimum and 20-Year Data Retention
Universal Serial Bus (USB) Features
• USB V2.0 Compliant
• Full Speed (12 Mbps) and Low Speed (1.5 Mbps)
• Supports Control, Interrupt, Isochronous and Bulk
Transfers
• Supports up to 32 Endpoints (16 bidirectional)
• USB module can use any RAM Location on the
Device as USB Endpoint Buffers
• On-Chip USB Transceiver with Crystal-less operation
Flexible Oscillator Structure:
•
•
•
•
•
•
•
•
High-Precision Internal Oscillator (±0.15% typ.) for USB
Two External Clock modes, up to 48 MHz (12 MIPS)
Low-Power, 31 kHz Internal RC Oscillator
Tunable Internal Oscillator (31 kHz to 8 MHz, or
up to 48 MHz with PLL)
Secondary Oscillator using Timer1 @ 32 kHz
Fail-Safe Clock Monitor:
- Allows for safe shutdown if any clock stops
Two-Speed Oscillator Start-up
Programmable Reference Clock Output Generator
2011 Microchip Technology Inc.
DS39931D-page 3
PIC18F46J50 FAMILY
Program
Memory (bytes)
SRAM (bytes)
Comparators
ECCP/(PWM)
Remappable
Pins
Deep Sleep
MSSP
EUSART
SPI w/DMA
I
2
C™
10-Bit A/D (ch)
PMP/PSP
Timers
8/16-Bit
CTMU
PIC18F/LF
(1)
Device
RTCC
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Pins
USB
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
PIC18F24J50
PIC18F25J50
PIC18F26J50
PIC18F44J50
PIC18F45J50
PIC18F46J50
PIC18LF24J50
PIC18LF25J50
PIC18LF26J50
PIC18LF44J50
PIC18LF45J50
PIC18LF46J50
Note 1:
28
28
28
44
44
44
28
28
28
44
44
44
16K
32K
64K
16K
32K
64K
16K
32K
64K
16K
32K
64K
3776
3776
3776
3776
3776
3776
3776
3776
3776
3776
3776
3776
16
16
16
22
22
22
16
16
16
22
22
22
2/3
2/3
2/3
2/3
2/3
2/3
2/3
2/3
2/3
2/3
2/3
2/3
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
10
10
10
13
13
13
10
10
10
13
13
13
2
2
2
2
2
2
2
2
2
2
2
2
Y
Y
Y
Y
Y
Y
N
N
N
N
N
N
N
N
N
Y
Y
Y
N
N
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
See
Section 1.3 “Details on Individual Family Devices”, Section 4.6 “Deep Sleep Mode”
and
Section 27.3
“On-Chip Voltage Regulator”
for details describing the functional differences between PIC18F and PIC18LF
variants in this device family.
DS39931D-page 4
2011 Microchip Technology Inc.
PIC18F46J50 FAMILY
Pin Diagrams
28-Pin SPDIP/SOIC/SSOP
(1)
MCLR
RA0/AN0/C1INA/ULPWU/RP0
RA1/AN1/C2INA/RP1
RA2/AN2/V
REF
-/CV
REF
/C2INB
RA3/AN3/V
REF
+/C1INB
V
DDCORE
/V
CAP
(2)
RA5/AN4/SS1/HLVDIN/RCV/RP2
V
SS
OSC1/CLKI/RA7
OSC2/CLKO/RA6
RC0/T1OSO/T1CKI/RP11
RC1/T1OSI/UOE/RP12
RC2/AN11/CTPLS/RP13
V
USB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
= Pins are up to 5.5V tolerant
RB7/KBI3/PGD/RP10
RB6/KBI2/PGC/RP9
RB5/KBI1/SDI1/SDA1/RP8
RB4/PMA1/KBI0/SCK1/SCL1/RP7
RB3/AN9/CTED2/VPO/RP6
RB2/AN8/CTED1/VMO/REFO/RP5
RB1/AN10/RTCC/RP4
RB0/AN12/INT0/RP3
V
DD
V
SS
RC7/RX1/DT1/SDO1/RP18
RC6/TX1/CK1/RP17
RC5/D+/VP
RC4/D-/VM
28-Pin QFN
(1,3)
RA2/AN2/V
REF
-/CV
REF
/C2INB
RA3/AN3/V
REF
+/C1INB
V
DDCORE
/V
CAP
(2)
RA5/AN4/SS1/HLVDIN/RCV/RP2
V
SS
OSC1/CLKI/RA7
OSC2/CLKO/RA6
1
2
3
4
5
6
7
RA1/AN1/C2INA/RP1
RA0/AN0/C1INA/ULPWU/RP0
MCLR
RB7/KBI3/PGD/RP10
RB6/KBI2/PGC/RP9
RB5/KBI1/SDI1/SDA1/RP8
RB4/KBI0/SCK1/SCL1/RP7
28 27 26 25 24 23 22
21
20
19
18
17
16
15
RB3/AN9/CTED2/VPO/RP6
RB2/AN8/CTED1/VMO/REFO/RP5
RB1/AN10/RTCC/RP4
RB0/AN12/INT0/RP3
V
DD
V
SS
RC7/RX1/DT1/SDO1/RP18
PIC18F2XJ50
8 9 1011 12 13 14
Legend: RPn
represents remappable pins.
Note 1:
Some input and output functions are routed through the Peripheral Pin Select (PPS) module and can be
dynamically assigned to any of the RPn pins. For a list of the input and output functions, see
Table 10-13
and
Table 10-14,
respectively. For details on configuring the PPS module, see
Section 10.7 “Peripheral
Pin Select (PPS)”.
2:
See
Section 27.3 “On-Chip Voltage Regulator”
for details on how to connect the V
DDCORE
/V
CAP
pin.
3:
For the QFN package, it is recommended that the bottom pad be connected to V
SS
.
2011 Microchip Technology Inc.
RC0/T1OSO/T1CKI/RP11
RC1/T1OSI/UOE/RP12
RC2/AN11/CTPLS/RP13
V
USB
RC4/D-/VM
RC5/D+/VP
RC6/TX1/CK1/RP17
PIC18F2XJ50
DS39931D-page 5
FPGA/CPLD
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