EEWORLDEEWORLDEEWORLD

Part Number

Search

P-25A72L

Description
Parabolic Antenna, 2480MHz Min, 2700MHz Max, 31.1dB Gain, 4.4deg 3dB Beamwidth
CategoryWireless rf/communication    Radio frequency and microwave   
File Size49KB,1 Pages
ManufacturerGeneral Dynamics SATCOM Technologies
Download Datasheet Parametric View All

P-25A72L Overview

Parabolic Antenna, 2480MHz Min, 2700MHz Max, 31.1dB Gain, 4.4deg 3dB Beamwidth

P-25A72L Parametric

Parameter NameAttribute value
MakerGeneral Dynamics SATCOM Technologies
Reach Compliance Codeunknown
applicationLOS
Beamwidth-H4.4 deg
diameter1.8 mm
front to back ratio36 dB
Gain31.1 dB
OmnidirectionalNO
Maximum operating frequency2700 MHz
Minimum operating frequency2480 MHz
polarizationCIRCULAR
RF/Microwave Device TypesPARABOLIC ANTENNA
Maximum voltage standing wave ratio1.1
Commentary125 mph
Help!!! After downloading the source code of an algorithm from the Internet, how can I compile it into the embedded ARM? Teachers, please teach me~
!= mount -t nfs 192.168.0.100:/home/hello/try /mnt/nfs English: The following is what I did: (I installed Ubuntu on the virtual machine VMware, the development board is AT91RM9200, and cross-compiled ...
myfamily0719 Linux and Android
A good book on TCPIP
It is in English and is helpful for studying TCPIP...
wujianbo Embedded System
my country's blog users are expected to reach nearly 100 million next year
my country's blog users are expected to reach nearly 100 million next year 2006-7-17With the increase in the number of Chinese netizens and the further popularization of blogs, the number of Chinese b...
hkn RF/Wirelessly
Can't open hwi_disp_asm.s64P file?
When I'm debugging single-step, it pops up that the hwi_disp_asm.s64P file cannot be opened. What's going on? Is there something wrong with the configuration? Please give me some advice, thank you....
zhaolanbao DSP and ARM Processors
I have a new i3 computer, please give me some advice
CPU: i3 530 box 805 Motherboard: msi H55M-E33 749 Memory: 2 Apacer 1GB DDR3 1333 210 Hard disk: WD 500GB 7200 rpm 16MB (serial port/RE3) 330 Optical drive: Pioneer DVR-218CHV 219 Monitor: Samsung E222...
ws01103815 Embedded System
About Gated Clock Synthesis
Which form do you use when writing code for clock gating? 1.always @(posedge clk)beginif(enable)outelseout 2. assign ckg = enable?clk:0;always @(posedge ckg) ..... I can synthesize it into latch based...
eeleader FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1194  2329  1570  2055  359  25  47  32  42  8 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号