SN74AUP2G04DRYR datasheet, PDF

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SN74AUP2G04DRYR: DescriptionLow-Power Dual Inverter Gate 6-SON -40 to 85; Categorylogic logic; File Size2MB，24 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance

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SN74AUP2G04DRYR Overview

Low-Power Dual Inverter Gate 6-SON -40 to 85

SN74AUP2G04DRYR Parametric

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Texas Instruments
Parts packaging code	SON
package instruction	VSON, SOLCC6,.04,20
Contacts	6
Reach Compliance Code	compli
ECCN code	EAR99
Factory Lead Time	6 weeks
Samacsys Descripti	LOW-POWER DUAL INVERTER GATE
series	AUP/ULP/V
JESD-30 code	R-PDSO-N6
JESD-609 code	e4
length	1.45 mm
Load capacitance (CL)	30 pF
Logic integrated circuit type	INVERTER
MaximumI(ol)	0.004 A
Humidity sensitivity level	1
Number of functions	2
Number of entries	1
Number of terminals	6
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	VSON
Encapsulate equivalent code	SOLCC6,.04,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, VERY THIN PROFILE
method of packing	TR
Peak Reflow Temperature (Celsius)	260
power supply	1.2/3.3 V
Maximum supply current (ICC)	0.0009 mA
Prop。Delay @ Nom-Su	25.5 ns
propagation delay (tpd)	25.5 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	0.6 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	0.8 V
Nominal supply voltage (Vsup)	1.2 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	1 mm

SN74AUP2G04DRYR Related Products

	SN74AUP2G04DRYR	SN74AUP2G04DCKR	SN74AUP2G04DSFR	SN74AUP2G04YFPR
Description	Low-Power Dual Inverter Gate 6-SON -40 to 85	Low-Power Dual Inverter Gate 6-SC70 -40 to 85	Low-Power Dual Inverter Gate 6-SON -40 to 85	Low-Power Dual Inverter Gate 6-DSBGA -40 to 85
Brand Name	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments
Is it lead-free?	Lead free	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to	conform to
Parts packaging code	SON	SOIC	SON	BGA
package instruction	VSON, SOLCC6,.04,20	TSSOP, TSSOP6,.08	VSON, SOLCC6,.04,14	VFBGA, BGA6,2X3,16
Contacts	6	6	6	6
Reach Compliance Code	compli	compli	compli	compli
ECCN code	EAR99	EAR99	EAR99	EAR99
series	AUP/ULP/V	AUP/ULP/V	AUP/ULP/V	AUP/ULP/V
JESD-30 code	R-PDSO-N6	R-PDSO-G6	S-PDSO-N6	R-XBGA-B6
JESD-609 code	e4	e4	e4	e1
length	1.45 mm	2 mm	1 mm	1.17 mm
Load capacitance (CL)	30 pF	30 pF	30 pF	30 pF
Logic integrated circuit type	INVERTER	INVERTER	INVERTER	INVERTER
MaximumI(ol)	0.004 A	0.004 A	0.004 A	0.004 A
Humidity sensitivity level	1	1	1	1
Number of functions	2	2	2	2
Number of entries	1	1	1	1
Number of terminals	6	6	6	6
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	UNSPECIFIED
encapsulated code	VSON	TSSOP	VSON	VFBGA
Encapsulate equivalent code	SOLCC6,.04,20	TSSOP6,.08	SOLCC6,.04,14	BGA6,2X3,16
Package shape	RECTANGULAR	RECTANGULAR	SQUARE	RECTANGULAR
Package form	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, VERY THIN PROFILE	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
method of packing	TR	TR	TR	TR
Peak Reflow Temperature (Celsius)	260	260	260	260
power supply	1.2/3.3 V	1.2/3.3 V	1.2/3.3 V	1.2/3.3 V
Maximum supply current (ICC)	0.0009 mA	0.01 mA	0.0009 mA	0.0009 mA
Prop。Delay @ Nom-Su	25.5 ns	25.5 ns	25.5 ns	25.5 ns
propagation delay (tpd)	25.5 ns	25.5 ns	25.5 ns	25.5 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Schmitt trigger	NO	NO	NO	NO
Maximum seat height	0.6 mm	1.1 mm	0.4 mm	0.5 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	0.8 V	0.8 V	0.8 V	0.8 V
Nominal supply voltage (Vsup)	1.2 V	1.2 V	1.2 V	1.2 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form	NO LEAD	GULL WING	NO LEAD	BALL
Terminal pitch	0.5 mm	0.65 mm	0.35 mm	0.4 mm
Terminal location	DUAL	DUAL	DUAL	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	1 mm	1.25 mm	1 mm	0.77 mm
Factory Lead Time	6 weeks	6 weeks	6 weeks	-

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