TN0104
Low Threshold
N-Channel Enhancement-Mode
Vertical DMOS FETs
Ordering Information
BV
DSS
/
BV
DGS
40V
40V
*
Same as SOT-89.
†
R
DS(ON)
(max)
1.8Ω
2.0Ω
V
GS(th)
(max)
1.6V
1.6V
I
D(ON)
(min)
2.0A
2.0A
Order Number / Package
TO-92
TN0104N3
—
TO-243AA*
—
TN0104N8
Die
†
TN0104ND
—
Product supplied on 2000 piece carrier tape reels.
MIL visual screening available
7
Product marking for TO-243AA:
Features
Low threshold —1.6V max.
High input impedance
Low input capacitance
Fast switching speeds
Low on resistance
Free from secondary breakdown
Low input and output leakage
Complementary N- and P-channel devices
TN1L*
Where *=2-week alpha date code
Low Threshold DMOS Technology
These low threshold enhancement-mode (normally-off) transis-
tors utilize a vertical DMOS structure and Supertex’s well-proven
silicon-gate manufacturing process. This combination produces
devices with the power handling capabilities of bipolar transistors
and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all MOS
structures, these devices are free from thermal runaway and
thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where very low threshold
voltage, high breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
Applications
Logic level interfaces – ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
Package Options
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
Operating and Storage Temperature
Soldering Temperature*
*
For TO-39 and TO-92, distance of 1.6 mm from case for 10 seconds.
7-31
BV
DSS
BV
DGS
±
20V
-55°C to +150°C
300°C
D
G
D
S
TO-243AA
(SOT-89)
SGD
TO-92
Note: See Package Outline section for dimensions.
TN0104
Thermal Characteristics
Package
TO-92
TO-243AA
†
I
D
(continuous)*
0.80A
1.40A
I
D
(pulsed)
2.40A
2.90A
Power Dissipation
@ T
C
= 25
°
C
1.0W
1.6W
†
θ
jc
°
C/W
125
15
θ
ja
°
C/W
170
78
†
I
DR
*
0.80A
1.40A
I
DRM
2.40A
2.90A
*
I
D
(continuous) is limited by max rated T
j
.
T
A
= 25°C. Mounted on FR5 Board, 25mm x 25mm x 1.57mm. Signficant P
D
increase possible on ceramic substrate.
Electrical Characteristics
Symbol
BV
DSS
V
GS(th)
∆V
GS(th)
I
GSS
I
DSS
Parameter
Drain-to-Source
Breakdown Voltage
Gate Threshold Voltage
(@ 25°C unless otherwise specified)
Min
40
0.6
-3.8
0.1
1.6
-5.0
100
1
100
Typ
Max
Unit
V
V
mV/°C
nA
µA
µA
Conditions
V
GS
= 0V, I
D
= 1.0mA
V
GS
= V
DS
, I
D
= 500µA
V
GS
= V
DS
, I
D
= 1.0mA
V
GS
=
±20V,
V
DS
= 0V
V
GS
=0V, V
DS
= Max Rating
V
GS
= 0V, V
DS
= 0.8 Max Rating
T
A
= 125°C
V
GS
= 3V, V
DS
= 20V
A
V
GS
= 5V, V
DS
= 20V
V
GS
= 10V, V
DS
= 20V
V
GS
= 3V, I
D
= 50mA
2.5
1.8
2.0
0.7
0.34
0.45
70
50
15
3.0
7.0
6.0
5.0
5.0
8.0
9.0
8.0
1.8
2.0
300
V
ns
V
GS
= 0V, I
SD
= 1.0A
V
GS
= 0V, I
SD
= 0.5A
V
GS
= 0V, I
SD
= 1A
ns
V
DD
= 20V, I
D
= 1A
R
GEN
= 25Ω
pF
V
GS
= 0V, V
DS
= 20V
f = 1 MHz
1.0
%/°C
Ω
Ω
V
GS
= 5V, I
D
= 250mA
V
GS
= 10V, I
D
= 1A
V
GS
= 10V, I
D
= 1A
V
GS
=10V, I
D
= 1A,
V
DS
= 20V, I
D
= 0.5A
Change in V
GS(th)
with Temperature
Gate Body Leakage
Zero Gate Voltage Drain Current
I
D(ON)
ON-State Drain Current
0.5
2.0
0.35
1.1
2.6
5.0
All Packages
TO-92
TO-243AA
2.3
1.5
R
DS(ON)
Static Drain-to-Source
ON-State Resistance
∆R
DS(ON)
G
FS
C
ISS
C
OSS
C
RSS
t
d(ON)
t
r
t
d(OFF)
t
f
V
SD
t
rr
Change in R
DS(ON)
with Temperature
Forward Transconductance
Input Capacitance
Common Source Output Capacitance
Reverse Transfer Capacitance
Turn-ON Delay Time
Rise Time
Turn-OFF Delay Time
Fall Time
Diode Forward
Voltage Drop
Reverse Recovery Time
TO-92
TO-243AA
1.2
Notes:
1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
V
DD
Switching Waveforms and Test Circuit
10V
90%
INPUT
0V
10%
t
(ON)
t
d(ON)
V
DD
OUTPUT
0V
90%
90%
t
r
t
(OFF)
t
d(OFF)
t
F
D.U.T.
10%
10%
INPUT
PULSE
GENERATOR
R
gen
R
L
OUTPUT
7-32
TN0104
Typical Performance Curves
Output Characteristics
3.75
3.75
Saturation Characteristics
3.0
VGS = 10V
3.0
I
D
(amperes)
8V
1.5
6V
I
D
(amperes)
2.25
2.25
VGS = 10V
8V
1.5
6V
0.75
4V
0.75
4V
0
0
10
20
30
2V
0
40
50
0
2
4
6
8
2V
10
V
DS
(volts)
Transconductance vs. Drain Current
0.75
5
V
DS
(volts)
Power Dissipation vs. Case Temperature
7
V
DS
= -25V
25V
0.60
T
A
= -55
°
C
4
G
FS
(siemens)
T
A
= 125
°
C
0.30
P
D
(watts)
0.45
T
A
= 25
°
C
3
2
TO-243AA
(T A = 25°C)
TO-92
0.15
1
0
0
0.5
1.0
1.5
2.0
2.5
0
0
25
50
75
100
125
150
I
D
(amperes)
Maximum Rated Safe Operating Area
10
1.0
T
C
(
°
C)
Thermal Response Characteristics
TO-243AA
0.8
Thermal Resistance (normalized)
TO-39 (DC)
T
A
= 25°C
P
D
= 1.6W
I
D
(amperes)
1.0
TO-92 (DC)
TO-243AA (DC)
(T A = 25°C)
0.6
0.4
0.1
0.2
0.01
0.1
1
10
100
TO-92
P
D
= 1W
T
C
= 25°C
0.01
0.1
1
10
0
0.001
V
DS
(volts)
t
p
(seconds)
7-33
TN0104
Typical Performance Curves
BV
DSS
Variation with Temperature
1.3
10
On-Resistance vs. Drain Current
V
GS
= 5V
1.2
8
BV
DSS
(normalized)
R
DS(ON)
(ohms)
1.1
6
1.0
4
V
GS
= 10V
0.9
2
0.8
-50
0
50
100
150
0
0
1
2
T
j
(
°
C)
Transfer Characteristics
3.0
I
D
(amperes)
V
(th)
and R
DS
Variation with Temperature
1.4
1.4
T
A
= -55
°
C
V
DS
= 25V
2.4
25
°
C
1.2
1.2
1.8
125
°
C
1.0
R
DS(ON)
@ 5V, 0.25A
1.0
1.2
0.8
V
(th)
@ 0.5mA
0.8
0.6
0.6
0.6
0
0.4
0
2
4
6
8
10
-50
0
50
100
150
0.4
V
GS
(volts)
Capacitance vs. Drain-to-Source Voltage
100
10
T
j
(
°
C)
Gate Drive Dynamic Characteristics
V
DS
= 10V
8
f = 1MHz
75
55pF
C (picofarads)
V
GS
(volts)
40V
6
C
ISS
50
4
25
C
OSS
2
C
RSS
0
0
10
20
30
40
0
0.5
0.65
50pF
0.8
0.95
1.1
1.25
V
DS
(volts)
Q
G
(nanocoulombs)
7-34
R
DS(ON)
(normalized)
V
GS(th)
(normalized)
I
D
(amperes)
Embedded System
京公网安备 11010802033920号
EEWORLD
