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M6XXLFXI

Description
Clock Generator, CMOS, 3 X 3 MM, LEAD FREE, MO-220, QFN-24
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size475KB,17 Pages
ManufacturerCypress Semiconductor
Environmental Compliance
Download Datasheet Parametric Compare View All

M6XXLFXI Overview

Clock Generator, CMOS, 3 X 3 MM, LEAD FREE, MO-220, QFN-24

M6XXLFXI Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerCypress Semiconductor
Parts packaging codeQFN
package instructionVQCCN,
Contacts24
Reach Compliance Codecompli
ECCN codeEAR99
Other featuresCUSTOMER SPECIFIC FREQUENCY CONFIGURATION
JESD-30 codeS-XQCC-N16
JESD-609 codee4
length3 mm
Humidity sensitivity level3
Number of terminals16
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialUNSPECIFIED
encapsulated codeVQCCN
Package shapeSQUARE
Package formCHIP CARRIER, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height0.6 mm
Maximum supply voltage3.6 V
Minimum supply voltage2.25 V
Nominal supply voltage2.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceNICKEL PALLADIUM GOLD
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature20
width3 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER
MoBL
®
Clock
M300/M600
Three-PLL Programmable Clock Generator
for Portable Applications
Three-PLL Programmable Clock Generator for Portable Applications
Features
Benefits
Device Operating Voltage Options:
MoBL Clock M300 Family: 1.8 V
MoBL Clock M600 Family: 2.5 V, 3.0 V, or 3.3 V
Selectable clock output voltages for both MoBL Clock M300
and M600:
1.5 V, 1.8 V, 2.5 V, 3.0 V, or 3.3 V
Fully integrated ultra low power phase-locked loops (PLLs)
Input reference clock frequency range: 1–48 MHz
Output clock frequency range: 3–50 MHz
Three
I
2
C™
programmable output clocks
Programmable output drive strengths
150 ps typical cycle-to-cycle jitter
Optional Spread Spectrum for EMI reduction
16-pin (3 × 3 × 0.6 mm) QFN Package
Industrial temperature range
Suitable for cell phone, portable, and consumer electronics
applications
Multiple high-performance PLLs allow synthesis of unrelated
frequencies
Application compatibility in multiple output voltage levels
Optional Spread Spectrum capable PLLs with Lexmark or
Linear profile for maximum EMI reduction
PLLs can be programmed for system frequency margin tests
Meets critical timing requirements in complex system designs
Individually enable or disable each output using I
2
C
Ease of output clock selection using programmable crossbar
switches
Logic Block Diagram
VDD_CLK1
VDD_CLK2
VDD_CLK3
EXCLKIN
REF SEL
Crossbar
Switch
Output
Dividers
and
PLL2
(SS)
PLL3
(SS)
Drive
Strength
Control
CLK1
PLL1
MUX
and
Control
Logic
CLK2
CLK3
SCL
SDA
PD#/OE
I2C
Cypress Semiconductor Corporation
Document Number: 001-12946 Rev. *C
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised December 7, 2010
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Description Clock Generator, CMOS, 3 X 3 MM, LEAD FREE, MO-220, QFN-24 Clock Generator, CMOS, 3 X 3 MM, LEAD FREE, MO-220, QFN-24 Clock Generator, CMOS, 3 X 3 MM, LEAD FREE, MO-220, QFN-24 Clock Generator, 50MHz, CMOS, 3 X 3 MM, LEAD FREE, MO-220, QFN-24 Clock Generator, 50MHz, CMOS, 3 X 3 MM, LEAD FREE, MO-220, QFN-24 Clock Generator, CMOS, 3 X 3 MM, LEAD FREE, MO-220, QFN-24
Is it Rohs certified? conform to conform to conform to conform to conform to conform to
Maker Cypress Semiconductor Cypress Semiconductor Cypress Semiconductor Cypress Semiconductor Cypress Semiconductor Cypress Semiconductor
Parts packaging code QFN QFN QFN QFN QFN QFN
package instruction VQCCN, VQCCN, VQCCN, VQCCN, VQCCN, VQCCN,
Contacts 24 24 24 24 24 24
Reach Compliance Code compli compliant compliant compliant compli compli
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
JESD-30 code S-XQCC-N16 S-XQCC-N16 S-XQCC-N16 S-XQCC-N16 S-XQCC-N16 S-XQCC-N16
JESD-609 code e4 e4 e4 e4 e4 e4
length 3 mm 3 mm 3 mm 3 mm 3 mm 3 mm
Humidity sensitivity level 3 3 3 3 3 3
Number of terminals 16 16 16 16 16 16
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Package body material UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED
encapsulated code VQCCN VQCCN VQCCN VQCCN VQCCN VQCCN
Package shape SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE
Package form CHIP CARRIER, VERY THIN PROFILE CHIP CARRIER, VERY THIN PROFILE CHIP CARRIER, VERY THIN PROFILE CHIP CARRIER, VERY THIN PROFILE CHIP CARRIER, VERY THIN PROFILE CHIP CARRIER, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) 260 260 260 260 260 260
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 0.6 mm 0.6 mm 0.6 mm 0.6 mm 0.6 mm 0.6 mm
Maximum supply voltage 3.6 V 3.6 V 1.95 V 1.95 V 1.95 V 1.95 V
Minimum supply voltage 2.25 V 2.25 V 1.65 V 1.65 V 1.65 V 1.65 V
Nominal supply voltage 2.5 V 2.5 V 1.8 V 1.8 V 1.8 V 1.8 V
surface mount YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) NICKEL PALLADIUM GOLD
Terminal form NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD
Terminal pitch 0.5 mm 0.5 mm 0.5 mm 0.5 mm 0.5 mm 0.5 mm
Terminal location QUAD QUAD QUAD QUAD QUAD QUAD
Maximum time at peak reflow temperature 20 20 20 20 20 20
width 3 mm 3 mm 3 mm 3 mm 3 mm 3 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER
Other features CUSTOMER SPECIFIC FREQUENCY CONFIGURATION CUSTOMER SPECIFIC FREQUENCY CONFIGURATION CUSTOMER SPECIFIC FREQUENCY CONFIGURATION - - CUSTOMER SPECIFIC FREQUENCY CONFIGURATION
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