PBLS6003D
60 V PNP BISS loadswitch
Rev. 02 — 7 September 2009
Product data sheet
1. Product profile
1.1 General description
PNP low V
CEsat
Breakthrough In Small Signal (BISS) transistor and
NPN Resistor-Equipped Transistor (RET) in a SOT457 (SC-74) small Surface Mounted
Device (SMD) plastic package.
1.2 Features
I
I
I
I
I
Low V
CEsat
(BISS) transistor and resistor-equipped transistor in one package
Low threshold voltage (< 1 V) compared to MOSFET
Low drive power required
Space-saving solution
Reduction of component count
1.3 Applications
I
I
I
I
Supply line switches
Battery charger switches
High-side switches for LEDs, drivers and backlights
Portable equipment
1.4 Quick reference data
Table 1.
Symbol
V
CEO
I
C
R
CEsat
Quick reference data
Parameter
collector-emitter voltage
collector current (DC)
collector-emitter saturation
resistance
collector-emitter voltage
output current (DC)
bias resistor 1 (input)
bias resistor ratio
I
C
=
−1
A;
I
B
=
−100
mA
open base
Conditions
open base
[1]
[2]
Min
-
-
-
Typ
-
-
255
Max
−60
−1
340
Unit
V
A
mΩ
TR1; PNP low V
CEsat
transistor
TR2; NPN resistor-equipped transistor
V
CEO
I
O
R1
R2/R1
[1]
[2]
-
-
7
0.8
-
-
10
1
50
100
13
1.2
V
mA
kΩ
Device mounted on a ceramic Printed-Circuit Board (PCB), Al
2
O
3
, standard footprint.
Pulse test: t
p
≤
300
µs; δ ≤
0.02
NXP Semiconductors
PBLS6003D
60 V PNP BISS loadswitch
2. Pinning information
Table 2.
Pin
1
2
3
4
5
6
Pinning
Description
emitter TR1
base TR1
output (collector) TR2
GND (emitter) TR2
input (base) TR2
collector TR1
1
2
3
sym036
Simplified outline
6
5
4
Symbol
6
5
4
1
2
3
R1
R2
TR2
TR1
3. Ordering information
Table 3.
Ordering information
Package
Name
PBLS6003D
SC-74
Description
plastic surface mounted package; 6 leads
Version
SOT457
Type number
4. Marking
Table 4.
Marking codes
Marking code
F3
Type number
PBLS6003D
PBLS6003D_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 7 September 2009
2 of 16
NXP Semiconductors
PBLS6003D
60 V PNP BISS loadswitch
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CBO
V
CEO
V
EBO
I
C
Parameter
collector-base voltage
collector-emitter voltage
emitter-base voltage
collector current (DC)
Conditions
open emitter
open base
open collector
[1]
[2]
[3]
Min
-
-
-
-
-
-
-
-
Max
−80
−60
−5
−700
−850
−1
−2
−300
−1
250
350
400
50
50
10
+40
−10
100
100
200
200
200
400
530
600
+150
150
+150
Unit
V
V
V
mA
mA
A
A
mA
A
mW
mW
mW
V
V
V
V
V
mA
mA
mW
mW
mW
mW
mW
mW
°C
°C
°C
TR1; PNP low V
CEsat
transistor
I
CM
I
B
I
BM
P
tot
peak collector current
base current (DC)
peak base current
total power dissipation
single pulse;
t
p
≤
1 ms
single pulse;
t
p
≤
1 ms
T
amb
≤
25
°C
[1]
[2]
[3]
-
-
-
-
-
-
-
-
-
-
-
TR2; NPN resistor-equipped transistor
V
CBO
V
CEO
V
EBO
V
I
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
positive
negative
I
O
I
CM
P
tot
output current (DC)
peak collector current
total power dissipation
T
amb
≤
25
°C
[1]
[2]
[3]
open emitter
open base
open collector
-
-
-
-
-
-
−65
-
−65
Per device
P
tot
total power dissipation
T
amb
≤
25
°C
[1]
[2]
[3]
T
stg
T
j
T
amb
[1]
[2]
[3]
storage temperature
junction temperature
ambient temperature
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1cm
2
.
Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
PBLS6003D_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 7 September 2009
3 of 16
NXP Semiconductors
PBLS6003D
60 V PNP BISS loadswitch
0.8
P
tot
(W)
0.6
(1)
(2)
006aaa461
0.4
(3)
0.2
0
0
40
80
120
160
T
amb
(°C)
(1) Ceramic PCB, Al
2
O
3
, standard footprint
(2) FR4 PCB, mounting pad for collector 1cm
2
(3) FR4 PCB, standard footprint
Fig 1.
Power derating curves
6. Thermal characteristics
Table 6.
Symbol
Per device
R
th(j-a)
thermal resistance from
junction to ambient
in free air
[1]
[2]
[3]
Thermal characteristics
Parameter
Conditions
Min
-
-
-
-
Typ
-
-
-
-
Max
312
236
208
105
Unit
K/W
K/W
K/W
K/W
TR1; PNP low V
CEsat
transistor
R
th(j-sp)
[1]
[2]
[3]
thermal resistance from
junction to solder point
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1cm
2
.
Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
PBLS6003D_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 7 September 2009
4 of 16
NXP Semiconductors
PBLS6003D
60 V PNP BISS loadswitch
10
3
Z
th(j-a)
(K/W)
δ
=1
0.75
0.5
0.33
10
2
0.2
0.1
0.05
10
0.02
0.01
006aaa462
0
1
10
−1
10
−5
10
−4
10
−3
10
−2
10
−1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, standard footprint
Fig 2.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse time;
typical values
006aaa463
10
3
Z
th(j-a)
(K/W)
10
2
δ
=1
0.75
0.5
0.33
0.2
0.1
0.05
10
0.02
0.01
0
1
10
−5
10
−4
10
−3
10
−2
10
−1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, mounting pad for collector 1cm
2
Fig 3.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse time;
typical values
PBLS6003D_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 7 September 2009
5 of 16
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