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ANALOG
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TECHNICAL
DATA
LowCostGeneral urpose
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Analog-
To-Digital onverter
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PRELIMINARY
OBS
FEATURES
12 Bit Resolution and Accuracy
Very High Performance/Cost Ratio
Monotonic from OoCto +50°C
40J,Ls
Conversion Time
Low Profile Module
Parallel and Serial Outputs
TTL/DTL Logic Levels
User Selected Input Ranges
Input Buffer Option Available
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GENERAL DESCRIPTION
The ADC-12QZ is a 12-bit successive approximation type
general purpose analog-to-digital converter that offers mod-
erate speed and good performance at very low cost. Analog
Devices' proprietary monolithic quad switches and a unique
combination of thin film and hybrid technology have been
incorporated in the ADC-12QZ, resulting in a converter that
has the basic performance of a much higher priced unit. It
is monotonic (no missing codes) from OoCto +50°C, and has
a maximum error of :tVzLSBrelative to full scale. The ADC-
12QZ is packaged in a convenient, small, low profile module,
and all of its logic inputs and outputs are fully TTL/DTL
compatible.
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Cg~~ER:..n
STATUS
CLOCK
STROBE
BIT 1
IMSBI
BIT 2
PREVIOUS WORD, 0011
.. 0
NEW WORD.
010111101000
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EASY TO USE
The ADC-12QZ was designed specifically to make it easy to
use. It contains its own temperature-compensated precision
voltage reference, and any of four input ranges (0 to +10V,
:tl0V, 0 to +5V, :t5V) can be selected with jumpers and con-
nections at the module terminals. If a high input impedance is
required, the ADC-12QZ can be special ordered with an in-
put buffer.
Binary output coding is used for unipolar operation, but for
operation in the bipolar mode, the parallel output data can be
either two's complement or offset binary at the user's option.
The two codes differ only in that the MSB output (pin 72) is
used for offset binary coding, while its complement, MSB (pin
70) is used for two's complement coding. STATUS, which in-
dicates when the parallel output data is valid, and its comple-
ment, STATUS, are both available.
A latched serial output having a nonreturn-to-zero (NRZ) for-
mat is taken from the output of a TTL flip-flop. The serial
data is transmitted MSB first in binary code for unipolar
r-'
Information furnished by Analog Devices is believed to be accurate
and reliable. However, no responsibility is assumed by Analog Devices
for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implica-
tion or otherwise under any patent or patent rights of Analog Devices.
operation and in offset binary code for bipolar operation. The
STROBE output is used to synchronize the serial data with a
receiving shift register.
TIMING
As shown in Figure 1, the leading edge ("0" to "1" transition)
of the convert command pulse sets the STATUS and MSB out-
puts to the "1" state, and the outputs of bits 2-12 to "0". The
conversion program begins on the trailing edge of the convert
command pulse with the starting of the internal clock. The bit
decisions are made on successive "1" to "0" clock pulse transi-
tions, with the MSB decision occurring first. The 200ns wide
strobe pulses are used to synchronize the transmission of serial
data. Serial data bits are valid on successive leading edges ("0"
to "1" transitions) of the strobe pulses. At the completion of
the conversion, the STATUS output returns to zero, signaling
that the parallel output data is valid.
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BIT 3
BIT 4
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BIT 12
ILSBI
SERIAL
OUT
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Figure
1.
ADC-12QZ
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Timing Diagram
Route 1 Industrial Park; P.O. Box 280; Norwood, Mass.02062
Tel: 617/329-4700
TWX:710/394-6577
--
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HIGH PERFORMANCEENERAL
G
PURPOSE
AID CONVERTERS
ADC-QM, ADC-QU
GENERAL DESCRIPTION
These converters are characterized primarily by hig!!
performance and general utility. The use of J..I.DAdB>
mono-
lithic quad switches with J..I.DAC
monolithic thin film
resistance networks provide these converters with the best
stability and linearity generally available. Prices are kept at
moderate levels by large volume manufactUring.
OBS
BWCK DIAGRAM
ADC-QM & ADC-QU
"5
3OK
lOOK ~
GAIN
ADC-QM
The ADC-QM is a high performance, general purpose
AID
con-
verter packaged in a low profile 2" x 4" module. It offers ex-
cellent stability over both time and temperature at moderate
cost. It is complete with an input buffer, and the desired input
range is selected by the user with jumpers and connections at
.the module terminals. The digital output code of the binary
version is natural binary for a unipolar input, but is selected by
the user to be either offset binary or two's complement with a
bipolar input. The ADC-QM is available in 8, 10, and 12
bit versions.
1
-15
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ADC
ADC-12QM
ADC-12QM
ADC-12QU
ADC-12QU
SHA
SHA-IA
SHA-2A
SHA-IA
SHA-2A
34kHz
39kHz
50kHz
67kHz
ORDERING GUIDE: ADC-QM and ADC-QU
ADC-XX
xx
/XXX
No. of
Bits
"'8
10
12
ADC-QU
The ADC-QU is a modular analog-to-digital converter that is
very similar to the ADC-QM, except that it offers an appre-
ciably shorter conversion time. The 12 bit version performs a
conversion in 15J..1.S
maximum. The ADC-QU's speed is the re-
sult of the use of Analog Devices' AD55 1
J..I.DAC8>
speed
high
quad current switches in its internal DAc. The ADC-QU is
pin-compatible with the ADC-QM, and in most applications
can serve as a direct plug-in replacement for it. When mounted
on an AC445 1 mounting card, the ADC-QU becomes a pin-
compatible substitute for the older model ADC-U.
DATA ACQUISITION APPLICATIONS
An ADC-QM or an ADC-QU can be combined with a SHA-IA
or SHA-2A sample-and-hold amplifier, and one or more MPX-
8A multiplexers to form a data acquisition subsystem. The
table below shows the maximum throughput rates (conversions!
sec) that can be achieved using various combinations of these
products. The settling time of the MPX-8A does not affect the
throughput rate because it can be settling on a new input signal
at the same time the
AID
converter is converting the signal
being held constant by the sample-and-hold amplifier.
MAX. THROUGHPUT RATE
',5V
3MEG
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ZERO
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-15
.15V
211 0.-
29
1
'5
00i't
GRO
3O~
)61 r.
Series
OM
QU
Output
Code
BIN (binary)
BCD (binary)
coded decimal)
Note: In the ADC-8QM and ADC-8QU, bit 8 is the LSB,
and pins 48,50,52 and 54 are deleted. In the ADC-I0QM
and ADC-IOQU, bit 10 is the LSB, and pins 48 and 50
are deleted.
92
CONVERTERS
Analog electronics
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