5962-9207801HTA datasheet, PDF

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5962-9207801HTA: DescriptionSRAM Module, 512KX8, 120ns, CMOS, DIP-32; Categorystorage storage; File Size243KB，20 Pages; ManufacturerMicrosemi; Websitehttps://www.microsemi.com

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5962-9207801HTA Overview

SRAM Module, 512KX8, 120ns, CMOS, DIP-32

5962-9207801HTA Parametric

Parameter Name	Attribute value
Objectid	1820273439
Parts packaging code	DIP
package instruction	DIP,
Contacts	32
Reach Compliance Code	compliant
ECCN code	3A001.A.2.C
Maximum access time	120 ns
JESD-30 code	R-XDIP-T32
JESD-609 code	e0
length	42.415 mm
memory density	4194304 bit
Memory IC Type	SRAM MODULE
memory width	8
Number of functions	1
Number of terminals	32
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	512KX8
Package body material	UNSPECIFIED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Certification status	Not Qualified
Filter level	MIL-STD-883
Maximum seat height	5.13 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	TIN LEAD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	15.24 mm

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REVISIONS

LTR

Add case outline T.

Table I; Changed the max limit for I

for device types 06 trough 09

from 200 mA to 210 mA. Changes the max limit for I

CCDR

for device

types 06 through 09 from 10.4 mA to 12.8 mA. -sld

Added note to paragraph 1.2.2 and table I to regarding the 4 transistor

design. Added thermal resistance ratings for all case outlines to

paragraph 1.3. Editorial changes throughout. -sld

Table I, t

, change minimum limit for device types 01 through 03 from

15 ns to 5 ns.

Update drawing to the latest requirements of MIL-PRF-38534. -sld

Update drawing to the latest requirements of MIL-PRF-38534. -gc

DESCRIPTION

DATE (YR-MO-DA)

97-02-24

98-06-23

APPROVED

K. A. Cottongim

00-07-03

Raymond Monnin

01-04-09

08-07-08

18-01-23

Raymond Monnin

Robert M. Heber

Charles F. Saffle

REV

SHEET

REV

SHEET

REV STATUS

OF SHEETS

PMIC N/A

REV

SHEET

PREPARED BY

Steve L. Duncan

CHECKED BY

Michael C. Jones

STANDARD

MICROCIRCUIT

DRAWING

DLA LAND AND MARITIME

COLUMBUS, OHIO 43218-3990

http://www.dla.mil/landandmaritime

THIS DRAWING IS

AVAILABLE

FOR USE BY ALL

DEPARTMENTS

AND AGENCIES OF THE

DEPARTMENT OF DEFENSE

AMSC N/A

APPROVED BY

Kendall A. Cottongim

MICROCIRCUIT, HYBRID, MEMORY,

DIGITAL, STATIC RANDOM ACCESS

MEMORY, CMOS, 512K x 8-BIT

DRAWING APPROVAL DATE

93-01-25

REVISION LEVEL

SIZE

SHEET

CAGE CODE

67268

1 OF

5962-92078

DSCC FORM 2233

APR 97

DISTRIBUTION STATEMENT A. Approved for public release. Distribution is unlimited.

5962-E205-18

2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text

of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a

specific exemption has been obtained.

3. REQUIREMENTS

3.1 Item requirements. The individual item performance requirements for device classes D, E, G, H, and K shall be in

accordance with MIL-PRF-38534. Compliance with MIL-PRF-38534 shall include the performance of all tests herein or as

designated in the device manufacturer's Quality Management (QM) plan or as designated for the applicable device class. The

manufacturer may eliminate, modify or optimize the tests and inspections herein, however the performance requirements as

defined in MIL-PRF-38534 shall be met for the applicable device class. In addition, the modification in the QM plan shall not

affect the form, fit, or function of the device for the applicable device class.

3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified

in MIL-PRF-38534 and herein.

3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1.

3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.

3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3.

3.2.4 Timing diagram(s). The timing diagram(s) shall be as specified on figures 4 and 5.

3.2.5 Block diagram. The block diagram shall be as specified on figure 6.

3.2.6 Output load circuit. The output load circuit shall be as specified on figure 7.

3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are

as specified in table I and shall apply over the full specified operating temperature range.

3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical

tests for each subgroup are described in table I.

3.5 Marking of device(s). Marking of device(s) shall be in accordance with MIL-PRF-38534. The device shall be marked with

the PIN listed in 1.2 herein. In addition, the manufacturer's vendor similar PIN may also be marked.

3.6 Data. In addition to the general performance requirements of MIL-PRF-38534, the manufacturer of the device described

herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sample,

for each device type listed herein. Also, the data should include a summary of all parameters manually tested, and for those

which, if any, are guaranteed. This data shall be maintained under document revision level control by the manufacturer and be

made available to the preparing activity (DLA Land and Maritime-VA) upon request.

3.7 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to supply to this

drawing. The certificate of compliance (original copy) submitted to DLA Land and Maritime-VA shall affirm that the

manufacturer's product meets the performance requirements of MIL-PRF-38534 and herein.

3.8 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38534 shall be provided with each lot of

microcircuits delivered to this drawing.

4. VERIFICATION

4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38534 or as

modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form,

fit, or function as described herein.

STANDARD

MICROCIRCUIT DRAWING

DLA LAND AND MARITIME

COLUMBUS, OHIO 43218-3990

SIZE

REVISION LEVEL

5962-92078

SHEET

DSCC FORM 2234

APR 97

5962-9207801HTA Related Products

	5962-9207801HTA	5962-9207801HTC	5962-9207805HTC	5962-9207807HTC	5962-9207809HTC	5962-9207805HTA
Description	SRAM Module, 512KX8, 120ns, CMOS, DIP-32	SRAM Module, 512KX8, 120ns, CMOS, DIP-32	SRAM Module, 512KX8, 55ns, CMOS, DIP32, DIP-32	SRAM Module, 512KX8, 35ns, CMOS, DIP32, DIP-32	SRAM Module, 512KX8, 20ns, CMOS, DIP32, DIP-32	SRAM Module, 512KX8, 55ns, CMOS, DIP-32
Objectid	1820273439	1820273441	1820273465	1820273477	1820273489	1820273463
Parts packaging code	DIP	DIP	DIP	DIP	DIP	DIP
package instruction	DIP,	DIP,	DIP,	DIP,	DIP,	DIP,
Contacts	32	32	32	32	32	32
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant
ECCN code	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C
Maximum access time	120 ns	120 ns	55 ns	35 ns	20 ns	55 ns
JESD-30 code	R-XDIP-T32	R-XDIP-T32	R-XDIP-T32	R-XDIP-T32	R-XDIP-T32	R-XDIP-T32
JESD-609 code	e0	e4	e4	e4	e4	e0
length	42.415 mm	42.415 mm	42.415 mm	42.415 mm	42.415 mm	42.415 mm
memory density	4194304 bit	4194304 bit	4194304 bit	4194304 bit	4194304 bit	4194304 bit
Memory IC Type	SRAM MODULE	SRAM MODULE	SRAM MODULE	SRAM MODULE	SRAM MODULE	SRAM MODULE
memory width	8	8	8	8	8	8
Number of functions	1	1	1	1	1	1
Number of terminals	32	32	32	32	32	32
word count	524288 words	524288 words	524288 words	524288 words	524288 words	524288 words
character code	512000	512000	512000	512000	512000	512000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C
organize	512KX8	512KX8	512KX8	512KX8	512KX8	512KX8
Package body material	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
encapsulated code	DIP	DIP	DIP	DIP	DIP	DIP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Filter level	MIL-STD-883	MIL-STD-883	MIL-STD-883	MIL-STD-883	MIL-STD-883	MIL-STD-883
Maximum seat height	5.13 mm	5.13 mm	5.13 mm	5.13 mm	5.13 mm	5.13 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY
Terminal surface	TIN LEAD	GOLD	GOLD	GOLD	GOLD	TIN LEAD
Terminal form	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
width	15.24 mm	15.24 mm	15.24 mm	15.24 mm	15.24 mm	15.24 mm

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