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PHD12N10E

Description
PowerMOS transistor
CategoryDiscrete semiconductor    The transistor   
File Size57KB,7 Pages
ManufacturerPhilips Semiconductors (NXP Semiconductors N.V.)
Websitehttps://www.nxp.com/
Download Datasheet Parametric View All

PHD12N10E Overview

PowerMOS transistor

PHD12N10E Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerPhilips Semiconductors (NXP Semiconductors N.V.)
package instruction,
Reach Compliance Codeunknow
ConfigurationSingle
Maximum drain current (Abs) (ID)14 A
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-609 codee0
Operating modeENHANCEMENT MODE
Maximum operating temperature175 °C
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)75 W
surface mountYES
Terminal surfaceTin/Lead (Sn/Pb)
Philips Semiconductors
Product Specification
PowerMOS transistor
PHD12N10E
GENERAL DESCRIPTION
N-channel enhancement mode
field-effect power transistor in a
plastic envelope suitable for surface
mounting. The device is intended for
use in Switched Mode Power
Supplies (SMPS), motor control,
welding, DC/DC and AC/DC
converters, and in general purpose
switching applications.
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
tot
T
j
R
DS(ON)
PARAMETER
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state resistance
MAX.
100
14
75
175
0.16
UNIT
V
A
W
˚C
PINNING - SOT428
PIN
1
2
3
tab
gate
drain
source
DESCRIPTION
PIN CONFIGURATION
tab
SYMBOL
d
g
2
drain
1
3
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DS
V
DGR
±V
GS
I
D
I
D
I
DM
P
tot
T
stg
T
j
PARAMETER
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage temperature
Junction Temperature
CONDITIONS
-
R
GS
= 20 kΩ
-
T
mb
= 25 ˚C
T
mb
= 100 ˚C
T
mb
= 25 ˚C
T
mb
= 25 ˚C
-
-
MIN.
-
-
-
-
-
-
-
- 55
-
MAX.
100
100
30
14
10
56
75
175
175
UNIT
V
V
V
A
A
A
W
˚C
˚C
THERMAL RESISTANCES
SYMBOL
R
th j-mb
R
th j-a
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
CONDITIONS
TYP.
-
pcb mounted, minimum
footprint
50
MAX.
2
-
UNIT
K/W
K/W
September 1997
1
Rev 1.000
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