5962R9576501VCC datasheet, PDF

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5962R9576501VCC: DescriptionHCT SERIES, TRIPLE 3-INPUT NAND GATE, CDIP14, CERAMIC, DIP-14; Categorylogic logic; File Size220KB，6 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/

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5962R9576501VCC Overview

HCT SERIES, TRIPLE 3-INPUT NAND GATE, CDIP14, CERAMIC, DIP-14

5962R9576501VCC Parametric

Parameter Name	Attribute value
Parts packaging code	DIP
package instruction	DIP, DIP14,.3
Contacts	14
Reach Compliance Code	unknown
Other features	RADIATION HARD CMOS/SILICON ON SAPPHIRE (SOS) TECHNOLOGY
series	HCT
JESD-30 code	R-CDIP-T14
JESD-609 code	e4
length	19.43 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	NAND GATE
MaximumI(ol)	0.004 A
Number of functions	3
Number of entries	3
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Prop。Delay @ Nom-Sup	24 ns
propagation delay (tpd)	24 ns
Certification status	Not Qualified
Schmitt trigger	NO
Filter level	MIL-PRF-38535 Class V
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	GOLD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
total dose	100k Rad(Si) V
width	7.62 mm
Base Number Matches	1

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5962R9576501VCC Related Products

	5962R9576501VCC	5962R9576501VXC	HCTS10KMSH	HCTS10DMSH
Description	HCT SERIES, TRIPLE 3-INPUT NAND GATE, CDIP14, CERAMIC, DIP-14	HCT SERIES, TRIPLE 3-INPUT NAND GATE, CDFP14	IC,LOGIC GATE,3 3-INPUT NAND,CMOS, RAD HARD,FP,14PIN,CERAMIC	IC,LOGIC GATE,3 3-INPUT NAND,CMOS, RAD HARD,DIP,14PIN,CERAMIC
package instruction	DIP, DIP14,.3	DFP, FL14,.3	DFP, FL14,.3	DIP, DIP14,.3
Reach Compliance Code	unknown	unknown	not_compliant	not_compliant
JESD-30 code	R-CDIP-T14	R-CDFP-F14	R-XDFP-F14	R-XDIP-T14
JESD-609 code	e4	e4	e0	e0
Load capacitance (CL)	50 pF	50 pF	50 pF	50 pF
Logic integrated circuit type	NAND GATE	NAND GATE	NAND GATE	NAND GATE
MaximumI(ol)	0.004 A	0.004 A	0.004 A	0.004 A
Number of terminals	14	14	14	14
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC	CERAMIC
encapsulated code	DIP	DFP	DFP	DIP
Encapsulate equivalent code	DIP14,.3	FL14,.3	FL14,.3	DIP14,.3
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	FLATPACK	FLATPACK	IN-LINE
power supply	5 V	5 V	5 V	5 V
Prop。Delay @ Nom-Sup	24 ns	24 ns	26 ns	26 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Schmitt trigger	NO	NO	NO	NO
Filter level	MIL-PRF-38535 Class V	MIL-PRF-38535 Class V	38535V;38534K;883S	38535V;38534K;883S
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V
surface mount	NO	YES	YES	NO
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY
Terminal surface	GOLD	GOLD	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE	FLAT	FLAT	THROUGH-HOLE
Terminal pitch	2.54 mm	1.27 mm	1.27 mm	2.54 mm
Terminal location	DUAL	DUAL	DUAL	DUAL
total dose	100k Rad(Si) V	100k Rad(Si) V	1M Rad(Si) V	1M Rad(Si) V

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