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DM74LS174N

Description
LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
Categorylogic    logic   
File Size65KB,7 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
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DM74LS174N Overview

LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16

DM74LS174N Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeDIP
package instructionDIP, DIP16,.3
Contacts16
Reach Compliance Codeunknow
seriesLS
JESD-30 codeR-PDIP-T16
JESD-609 codee0
length19.305 mm
Logic integrated circuit typeD FLIP-FLOP
Maximum Frequency@Nom-Su25000000 Hz
MaximumI(ol)0.008 A
Number of digits1
Number of functions6
Number of terminals16
Maximum operating temperature70 °C
Minimum operating temperature
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP16,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Maximum supply current (ICC)26 mA
propagation delay (tpd)36 ns
Certification statusNot Qualified
Maximum seat height5.08 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger typePOSITIVE EDGE
width7.62 mm
minfmax30 MHz
Base Number Matches1
DM74LS174 • DM74LS175 Hex/Quad D-Type Flip-Flops with Clear
August 1992
Revised April 2000
DM74LS174 • DM74LS175
Hex/Quad D-Type Flip-Flops with Clear
General Description
These positive-edge-triggered flip-flops utilize TTL circuitry
to implement D-type flip-flop logic. All have a direct clear
input, and the quad (175) versions feature complementary
outputs from each flip-flop.
Information at the D inputs meeting the setup time require-
ments is transferred to the Q outputs on the positive-going
edge of the clock pulse. Clock triggering occurs at a partic-
ular voltage level and is not directly related to the transition
time of the positive-going pulse. When the clock input is at
either the HIGH or LOW level, the D input signal has no
effect at the output.
Features
s
DM74LS174 contains six flip-flops with single-rail
outputs
s
DM74LS175 contains four flip-flops with double-rail
outputs
s
Buffered clock and direct clear inputs
s
Individual data input to each flip-flop
s
Applications include:
Buffer/storage registers
Shift registers
Pattern generators
s
Typical clock frequency 40 MHz
s
Typical power dissipation per flip-flop 14 mW
Ordering Code:
Order Number
DM74LS174M
DM74LS174SJ
DM74LS174N
DM74LS175M
DM74LS175SJ
DM74LS175N
Package Number
M16A
M16D
N16E
M16A
M16D
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
DM74LS174
DM74LS175
© 2000 Fairchild Semiconductor Corporation
DS006404
www.fairchildsemi.com

DM74LS174N Related Products

DM74LS174N DM74LS175 74LS174 74LS175 DM74LS174M DM74LS174 DM74LS175M DM74LS175N DM74LS174SJ DM74LS175SJ
Description LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
Is it Rohs certified? incompatible - - - incompatible - incompatible incompatible incompatible incompatible
Parts packaging code DIP - - - SOIC - SOIC DIP SOIC SOIC
package instruction DIP, DIP16,.3 - - - SOP, SOP16,.25 - SOP, SOP16,.25 DIP, DIP16,.3 SOP, SOP16,.3 SOP, SOP16,.3
Contacts 16 - - - 16 - 16 16 16 16
Reach Compliance Code unknow - - - unknown - unknow unknown unknow unknow
series LS LS LS LS LS LS LS - LS LS
Number of digits 1 4 4 4 1 4 4 - 1 4
Number of functions 6 1 1 1 6 1 1 - 6 1
Number of terminals 16 16 16 16 16 16 16 - 16 16
Maximum operating temperature 70 °C 70 Cel 70 Cel 70 Cel 70 °C 70 Cel 70 °C - 70 °C 70 °C
Output polarity TRUE COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY TRUE COMPLEMENTARY COMPLEMENTARY - TRUE COMPLEMENTARY
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL - COMMERCIAL COMMERCIAL
Terminal form THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE GULL WING THROUGH-HOLE GULL WING - GULL WING GULL WING
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL - DUAL DUAL
Trigger type POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE - POSITIVE EDGE POSITIVE EDGE
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