EEWORLDEEWORLDEEWORLD

Part Number

Search

DM74LS174SJ

Description
LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
Categorylogic    logic   
File Size65KB,7 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Download Datasheet Parametric Compare View All

DM74LS174SJ Online Shopping

Suppliers Part Number Price MOQ In stock  
DM74LS174SJ - - View Buy Now

DM74LS174SJ Overview

LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16

DM74LS174SJ Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerFairchild
Parts packaging codeSOIC
package instructionSOP, SOP16,.3
Contacts16
Reach Compliance Codeunknow
seriesLS
JESD-30 codeR-PDSO-G16
JESD-609 codee0
length10.2 mm
Logic integrated circuit typeD FLIP-FLOP
Maximum Frequency@Nom-Su25000000 Hz
MaximumI(ol)0.008 A
Number of digits1
Number of functions6
Number of terminals16
Maximum operating temperature70 °C
Minimum operating temperature
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP16,.3
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Maximum supply current (ICC)26 mA
propagation delay (tpd)36 ns
Certification statusNot Qualified
Maximum seat height2.1 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger typePOSITIVE EDGE
width5.3 mm
minfmax30 MHz
DM74LS174 • DM74LS175 Hex/Quad D-Type Flip-Flops with Clear
August 1992
Revised April 2000
DM74LS174 • DM74LS175
Hex/Quad D-Type Flip-Flops with Clear
General Description
These positive-edge-triggered flip-flops utilize TTL circuitry
to implement D-type flip-flop logic. All have a direct clear
input, and the quad (175) versions feature complementary
outputs from each flip-flop.
Information at the D inputs meeting the setup time require-
ments is transferred to the Q outputs on the positive-going
edge of the clock pulse. Clock triggering occurs at a partic-
ular voltage level and is not directly related to the transition
time of the positive-going pulse. When the clock input is at
either the HIGH or LOW level, the D input signal has no
effect at the output.
Features
s
DM74LS174 contains six flip-flops with single-rail
outputs
s
DM74LS175 contains four flip-flops with double-rail
outputs
s
Buffered clock and direct clear inputs
s
Individual data input to each flip-flop
s
Applications include:
Buffer/storage registers
Shift registers
Pattern generators
s
Typical clock frequency 40 MHz
s
Typical power dissipation per flip-flop 14 mW
Ordering Code:
Order Number
DM74LS174M
DM74LS174SJ
DM74LS174N
DM74LS175M
DM74LS175SJ
DM74LS175N
Package Number
M16A
M16D
N16E
M16A
M16D
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
DM74LS174
DM74LS175
© 2000 Fairchild Semiconductor Corporation
DS006404
www.fairchildsemi.com

DM74LS174SJ Related Products

DM74LS174SJ DM74LS175 74LS174 74LS175 DM74LS174M DM74LS174 DM74LS175M DM74LS175N DM74LS174N DM74LS175SJ
Description LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16 LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
Is it Rohs certified? incompatible - - - incompatible - incompatible incompatible incompatible incompatible
Parts packaging code SOIC - - - SOIC - SOIC DIP DIP SOIC
package instruction SOP, SOP16,.3 - - - SOP, SOP16,.25 - SOP, SOP16,.25 DIP, DIP16,.3 DIP, DIP16,.3 SOP, SOP16,.3
Contacts 16 - - - 16 - 16 16 16 16
Reach Compliance Code unknow - - - unknown - unknow unknown unknow unknow
series LS LS LS LS LS LS LS - LS LS
Number of digits 1 4 4 4 1 4 4 - 1 4
Number of functions 6 1 1 1 6 1 1 - 6 1
Number of terminals 16 16 16 16 16 16 16 - 16 16
Maximum operating temperature 70 °C 70 Cel 70 Cel 70 Cel 70 °C 70 Cel 70 °C - 70 °C 70 °C
Output polarity TRUE COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY TRUE COMPLEMENTARY COMPLEMENTARY - TRUE COMPLEMENTARY
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL - COMMERCIAL COMMERCIAL
Terminal form GULL WING THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE GULL WING THROUGH-HOLE GULL WING - THROUGH-HOLE GULL WING
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL - DUAL DUAL
Trigger type POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE - POSITIVE EDGE POSITIVE EDGE
How to design a suitable power supply
For an electronic system now, the design of the power supply part is becoming more and more important. I would like to discuss some of my own experience in power supply design with you to start a disc...
咖啡不加糖 PCB Design
ATSAMD20E17 memory space allocation
How much memory space is there in the boot area of ATSAMD20E17, how is the code area and EEPROM allocated? I don't quite understand the English manual. Please give me some advice. Thank you....
guo2016 Microchip MCU
Initializing a Build Environment
[b]Initializing a Build Environment[/b][color=#222222][backcolor=rgb(249, 249, 249)][font=Roboto, sans-serif][float=right][float=right][size=13px][b]IN THIS DOCUMENT[/b][list=1] [*][color=#258aaf][url...
Wince.Android Embedded System
LCD display driver enters self-protection mode when starting
As the title says. I am using CE5.0, and the LCD driver architecture is based on ddraw. At the beginning, GWES loaded the LCD driver library, and there was no problem in running and entering the deskt...
diyichen Embedded System
OPA690 Usage Notes
[i=s] This post was last edited by dontium on 2015-1-23 11:33 [/i] When opa690 is used for small signal input, the high frequency performance is not good after the amplification factor exceeds 101. Wh...
模拟IC Analogue and Mixed Signal
Power supply design that achieves low leakage current while maintaining EMI performance
Power supply design that achieves low leakage current while maintaining EMI performance In AC-DC switching power supplies, the main source of leakage current is the Y-type capacitor. By using transfor...
破茧佼龙 Power technology

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 295  2783  1146  1092  1853  6  57  24  22  38 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号