DM74S373 • DM74S374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops
August 1986
Revised May 2000
DM74S373 • DM74S374
3-STATE Octal D-Type Transparent Latches
and Edge-Triggered Flip-Flops
General Description
These 8-bit registers feature totem-pole 3-STATE outputs
designed specifically for driving highly-capacitive or rela-
tively low-impedance loads. The high-impedance state and
increased high-logic-level drive provide these registers with
the capability of being connected directly to and driving the
bus lines in a bus-organized system without need for inter-
face or pull-up components. They are particularly attractive
for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The eight latches of the DM74S373 are transparent D-type
latches meaning that while the enable (G) is HIGH the Q
outputs will follow the data (D) inputs. When the enable is
taken LOW the output will be latched at the level of the
data that was set up.
The eight flip-flops of the DM74S374 are edge-triggered D-
type flip-flops. On the positive transition of the clock, the Q
outputs will be set to the logic states that were set up at the
D inputs.
Schmitt-trigger buffered inputs at the enable/clock lines
simplify system design as ac and dc noise rejection is
improved by typically 400 mV due to the input hysteresis. A
buffered output control input can be used to place the eight
outputs in either a normal logic state (HIGH or LOW logic
levels) or a high-impedance state. In the high-impedance
state the outputs neither load nor drive the bus lines signifi-
cantly.
The output control does not affect the internal operation of
the latches or flip-flops. That is, the old data can be
retained or new data can be entered even while the outputs
are OFF.
Features
s
Choice of 8 latches or 8 D-type flip-flops in a single
package
s
3-STATE bus-driving outputs
s
Full parallel-access for loading
s
Buffered control inputs
s
P-N-P input reduce D-C loading on data lines
Ordering Code:
Order Number
DM74S373WM
DM74S373N
DM74S374WM
DM74S374N
Package Number
M20B
N20A
M20B
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
DM74S373N
DM74S374N
© 2000 Fairchild Semiconductor Corporation
DS006486
www.fairchildsemi.com
DM74S373 • DM74S374
Truth Tables
DM74S373
Output
Control
L
L
L
H
Enable
G
H
H
L
X
H
L
X
X
H
L
Q
0
Z
D
Output
Output
Control
L
L
L
H
↑
↑
L
X
H
L
X
X
H
L
Q
0
Z
DM74S374
Clock
D
Output
H
=
HIGH Level (Steady State)
L
=
LOW Level (Steady State)
X
=
Don’t Care
Z
=
High Impedance State
↑ =
Transition from LOW-to-HIGH level,
Q
0
=
The level of the output before steady-state input conditions were
established.
Logic Diagrams
74S373
Transparent Latches
74S374
Positive-Edge-Triggered Flip-Flops
www.fairchildsemi.com
2
DM74S373 • DM74S374
Absolute Maximum Ratings
(Note 1)
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
7V
5.5V
0°C to
+70°C
−65°C
to
+150°C
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
DM74S373 Recommended Operating Conditions
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
t
W
t
W
t
SU
t
H
T
A
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Pulse Width (Note 2)
Pulse Width (Note 3)
Data Setup Time (Note 4)(Note 5)
Data Hold Time (Note 4)(Note 5)
Free Air Operating Temperature
Enable HIGH
Enable LOW
Enable HIGH
Enable LOW
6
7.3
15
15
0↓
10↓
0
70
Parameter
Min
4.75
2
0.8
−6.5
20
Nom
5
Max
5.25
Units
V
V
V
mA
mA
ns
ns
ns
ns
ns
°C
Note 2:
C
L
=
15 pF, R
L
=
280Ω, T
A
=
25°C and V
CC
=
5V.
Note 3:
C
L
=
50 pF and R
L
=
280Ω, T
A
=
25°C and V
CC
=
5V.
Note 4:
The symbol (↓) indicates the falling edge of the clock pulse is used for reference.
Note 5:
T
A
=
25°C and V
CC
=
5V.
DM74S373 Electrical Characteristics
over recommended operating free air temperature (unless otherwise noted)
Symbol
V
I
V
OH
V
OL
I
I
I
IH
I
IL
I
OZH
I
OZL
I
OS
I
CC
Parameter
Input Clamp Voltage
HIGH Level
Output Voltage
LOW Level
Output Voltage
HIGH Level Input Current
LOW Level Input Current
Off-State Output Current with
Off-State Output Current with
Short Circuit Output Current
Supply Current
Conditions
V
CC
=
Min, I
I
= −18
mA
V
CC
=
Min, I
OH
=
Max
V
IL
=
Max, V
IH
=
Min
V
CC
=
Min, I
OL
=
Max
V
IH
=
Min, V
IL
=
Max
V
CC
=
Max, V
I
=
2.7V
V
CC
=
Max, V
I
=
0.5V
V
CC
=
Max, V
O
=
2.4V
V
CC
=
Max, V
O
=
0.5V
V
CC
=
Max (Note 7)
V
CC
=
Max
Outputs HIGH or LOW
Outputs Disabled
Note 6:
All typicals are at V
CC
=
5V, T
A
=
25°C.
Note 7:
Not more than one output should be shorted at a time, and the duration should not exceed one second.
Min
Typ
(Note 6)
Max
−1.2
Units
V
V
2.4
3.2
0.5
1
50
−250
50
−50
V
mA
µA
µA
µA
µA
mA
mA
Input Current @ Max Input Voltage V
CC
=
Max, V
I
=
5.5V
HIGH Level Output Voltage Applied V
IH
=
Min, V
IL
=
Max
LOW Level Output Voltage Applied V
IH
=
Min, V
IL
=
Max
−40
105
−100
160
190
3
www.fairchildsemi.com
DM74S373 • DM74S374
DM74S373 Switching Characteristics
at V
CC
=
5V and T
A
=
25°C
R
L
=
280Ω
Symbol
Parameter
From (Input)
To (Output)
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Enable Time to
HIGH Level Output
Output Enable Time to
LOW Level Output
Output Disable Time to
HIGH Level Output (Note 8)
Output Disable Time to
LOW Level Output (Note 8)
Note 8:
C
L
=
5 pF
C
L
=
15 pF
Min
Max
12
12
14
18
15
18
9
12
C
L
=
50 pF
Min
Max
14
16
14
21
17
23
Units
Data to Any Q
Data to Any Q
Enable to Any Q
Enable to Any Q
Output Control to Any Q
Output Control to Any Q
Output Control to Any Q
Output Control to Any Q
ns
ns
ns
ns
ns
ns
ns
ns
DM74S374 Recommended Operating Conditions
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
f
CLK
f
CLK
t
W
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Clock Frequency (Note 9)
Clock Frequency (Note 10)
Pulse Width
(Note 9)
Pulse Width
(Note 10)
t
SU
t
H
T
A
Clock HIGH
Clock LOW
Clock HIGH
Clock LOW
0
0
6
7.3
15
15
5↑
2↑
0
70
ns
ns
°C
ns
0.8
−6.5
20
75
75
Parameter
Min
4.75
Nom
5
Max
5.25
Units
V
V
V
mA
mA
MHz
MHz
Data Setup Time (Note 11)(Note 12)
Data Hold Time (Note 11)(Note 12)
Free Air Operating Temperature
Note 9:
C
L
=
15 pF, R
L
=
280Ω, T
A
=
25°C and V
CC
=
5V.
Note 10:
C
L
=
50 pF, R
L
=
280Ω, T
A
=
25°C and V
CC
=
5V.
Note 11:
The symbol (↑) indicates the rising edge of the clock pulse is used for reference.
Note 12:
T
A
=
25°C and V
CC
=
5V.
www.fairchildsemi.com
4
DM74S373 • DM74S374
DM74S374 Electrical Characteristics
over recommended operating free air temperature (unless otherwise noted)
Symbol
V
I
V
OH
V
OL
I
I
I
H
I
IL
I
OZH
I
OZL
I
OS
I
CC
Parameter
Input Clamp Voltage
HIGH Level
Output Voltage
LOW Level
Output Voltage
Input Current @ Max Input Voltage
HIGH Level Input Current
LOW Level Input Current
Off-State Output Current with
HIGH Level Output Voltage Applied
Off-State Output Current with
LOW Level Output Voltage Applied
Short Circuit Output Current
Supply Current
Conditions
V
CC
=
Min, I
I
= −18
mA
V
CC
=
Min, I
OH
=
Max
V
IL
=
Max, V
IH
=
Min
V
CC
=
Min, I
OL
=
Max
V
IH
=
Min, V
IL
=
Max
V
CC
=
Max, V
I
=
5.5V
V
CC
=
Max, V
I
=
2.7V
V
CC
=
Max, V
I
=
0.5V
V
CC
=
Max, V
O
=
2.4V
V
IH
=
Min, V
IL
=
Max
V
CC
=
Max, V
O
=
0.5V
V
IH
=
Min, V
IL
=
Max
V
CC
=
Max (Note 14)
V
CC
=
Max
Outputs HIGH
Outputs LOW
Outputs Disabled
Note 13:
All typicals are at V
CC
=
5V, T
A
=
25°C.
Note 14:
Not more than one output should be shorted at a time, and the duration should not exceed one second.
Min
Typ
(Note 13)
Max
−1.2
Units
V
V
2.4
3.2
0.5
1
50
−250
50
V
mA
µA
µA
µA
−50
−40
90
−100
110
140
160
µA
mA
mA
DM74S374 Switching Characteristics
at V
CC
=
5V and T
A
=
25°C
R
L
=
280Ω
Symbol
Parameter
From (Input)
To (Output)
f
MAX
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Maximum Clock Frequency
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Output Enable Time to
HIGH Level Output
Output Enable Time to
LOW Level Output
Output Disable Time from
HIGH Level Output (Note 15)
Output Disable Time from
LOW Level Output (Note 15)
Note 15:
C
L
=
5 pF
C
L
=
15 pF
Min
Max
75
C
L
=
50 pF
Min
Max
75
15
20
17
23
Units
MHz
ns
ns
ns
ns
ns
ns
Clock to Any Q
Clock to Any Q
Output Control to Any Q
Output Control to Any Q
Output Control to Any Q
Output Control to Any Q
15
17
15
18
9
12
5
www.fairchildsemi.com
京公网安备 11010802033920号
EEWORLD
