Sets the drive strength of the output drivers to be 2.5V LVTTL (HIGH), 1.8V LVTTL (MID)
or HSTL (LOW) compatible. Used in conjunction with V
DDQ
to set the interface levels.
Power supply for the device core and inputs
Power supply for the device outputs. When utilizing 2.5V LVTTL outputs, V
DDQ
should be
connected to V
DD
.
Power supply return for all power
A
/ V
REF
I
Adjustable
1
G1
G2
GL
Qn
RxS
TxS
V
DD
V
DDQ
GND
I
I
I
O
I
I
I
I
LVTTL
5
LVTTL
5
LVTTL
5
Adjustable
2
3 Level
3
3 Level
3
PWR
PWR
PWR
NOTES:
1. Inputs are capable of translating the following interface standards. User can select between:
Single-ended 2.5V LVTTL levels
or
Differential 2.5V/1.8V LVTTL levels
Single-ended 1.8V LVTTL levels
Differential HSTL and eHSTL levels
Differential LVEPECL levels
2. Outputs are user selectable to drive 2.5V, 1.8V LVTTL, eHSTL, or HSTL interface levels when used with the appropriate V
DDQ
voltage.
3. 3 level inputs are static inputs and must be tied to V
DD
or GND or left floating. These inputs are not hot-insertable or over-voltage tolerant.
4. Because the gate controls are asynchronous, runt pulses are possible. It is the user's responsibility to either time the gate control signals to minimize the
possibility of runt pulses or be able to tolerate them in down stream circuitry.
5. Pins listed as LVTTL inputs will accept 2.5V signals when RxS = HIGH or 1.8V signals when RxS = LOW or MID.
Absolute Maximum Ratings
1
Symbol
V
DD
V
DDQ
V
I
V
O
V
REF
T
STG
T
J
Power Supply Voltage
Output Power Supply
2
Input Voltage
Output Voltage
3
Reference Voltage
3
Storage Temperature
Junction Temperature
2
Description
Max
-0.5 to +3.6
-0.5 to +3.6
-0.5 to +3.6
-0.5 to V
DDQ
+0.5
-0.5 to +3.6
-65 to +165
150
Unit
V
V
V
V
V
°C
°C
Note:
1. These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
2. V
DDQ
and V
DD
internally operate independently. No power sequencing requirements need to be met.
3. Not to exceed 3.6V.
2.5V Single Data Rate 1:10 Clock Buffer Terabuffer
Notice: The information in this document is subject to change without notice.
4 of 21
September 2006
rev 0.2
Capacitance
1
(T
A
= +25°C, F = 1.0MHz)
Symbol
Parameter
C
IN
Input Capacitance
PCS2P5T907A
Min
Typ
3.5
Max
Unit
pF
NOTE:
1. This parameter is measured at characterization but not tested. Capacitance applies to all inputs except RxS and TxS.
Recommended Operating Range
Symbol
T
A
1
V
DD
V
DDQ1
V
T
Description
Ambient Operating Temperature
Internal Power Supply Voltage
HSTL Output Power Supply Voltage
Extended HSTL and 1.8V LVTTL Output Power
Supply Voltage
2.5V LVTTL Output Power Supply Voltage
Termination Voltage
Min
-40
2.4
1.4
1.65
Typ
+25
2.5
1.5
1.8
V
DD
V
DDQ
/ 2
Max
+85
2.6
1.6
1.95
Unit
°C
V
V
V
V
V
NOTE:
1. All power supplies should operate in tandem; if V
DD
or V
DDQ
is at a maximum, then V
DDQ
or V
DD
(respectively) should be at a maximum, and vice-versa.
Input/Output Selection
1
Input
2.5V LVTTL SE
1.8V LVTTL SE
2.5V LVTTL DSE
1.8V LVTTL DSE
LVEPECL DSE
eHSTL DSE
HSTL DSE
2.5V LVTTL DIF
1.8V LVTTL DIF
LVEPECL DIF
eHSTL DIF
HSTL DIF
2.5V LVTTL SE
1.8V LVTTL SE
2.5V LVTTL DSE
1.8V LVTTL DSE
LVEPECL DSE
eHSTL DSE
HSTL DSE
2.5V LVTTL DIF
1.8V LVTTL DIF
LVEPECL DIF
eHSTL DIF
HSTL DIF
1.8V LVTTL
2.5V LVTTL
Output
Input
2.5V LVTTL SE
1.8V LVTTL SE
2.5V LVTTL DSE
1.8V LVTTL DSE
LVEPECL DSE
eHSTL DSE
HSTL DSE
2.5V LVTTL DIF
1.8V LVTTL DIF
LVEPECL DIF
eHSTL DIF
HSTL DIF
2.5V LVTTL SE
1.8V LVTTL SE
2.5V LVTTL DSE
1.8V LVTTL DSE
LVEPECL DSE
eHSTL DSE
HSTL DSE
2.5V LVTTL DIF
1.8V LVTTL DIF
LVEPECL DIF
eHSTL DIF
HSTL DIF
Output
eHSTL
HSTL
NOTE: 1. The INPUT/OUTPUT SELECTION Table describes the total possible combinations of input and output interfaces. Single-Ended (SE) inputs in a
single- ended mode require the A/V
REF
pin to be connected to GND. Differential Single-Ended (DSE) is for single-ended operation in differential mode,
2.5V Single Data Rate 1:10 Clock Buffer Terabuffer
Notice: The information in this document is subject to change without notice.
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