PCS2P5T907AG-48TR datasheet, PDF

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PCS2P5T907AG-48TR: Description2.5V single data rate 1:10 clock buffer Terabuffer; Categorylogic logic; File Size742KB，21 Pages; ManufacturerPulseCore Semiconductor Corporation

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PCS2P5T907AG-48TR Overview

2.5V single data rate 1:10 clock buffer Terabuffer

PCS2P5T907AG-48TR Parametric

Parameter Name	Attribute value
Maker	PulseCore Semiconductor Corporation
package instruction	6.10 MM, GREEN, MO-153ED, TSSOP-48
Reach Compliance Code	unknown
series	907
Input adjustment	DIFFERENTIAL
JESD-30 code	R-PDSO-G48
length	12.5 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
Number of functions	1
Number of inverted outputs
Number of terminals	48
Actual output times	10
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)	2.5 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.025 ns
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	2.6 V
Minimum supply voltage (Vsup)	2.4 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
width	6.1 mm
minfmax	250 MHz

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September 2006

rev 0.2

2.5V Single Data Rate 1:10 Clock Buffer Terabuffer

PCS2P5T907A

Features

•

Guaranteed Low Skew < 25pS (max)

Very low duty cycle distortion

High speed propagation delay < 2.5nS. (max)

Up to 250MHz operation

Very low CMOS power levels

1.5V V

DDQ

for HSTL interface

Hot Insertable and over-voltage tolerant inputs

3-level inputs for selectable interface

Selectable HSTL, eHSTL, 1.8V / 2.5V LVTTL, or

LVEPECL input interface

Selectable differential or single-ended inputs and

ten single ended outputs

2.5V Supply Voltage

Available in TSSOP Package

Functional Description

The PCS2P5T907A 2.5V single data rate (SDR) clock

buffer is a user-selectable single-ended or differential input

to ten single-ended outputs buffer built on advanced metal

CMOS technology. The SDR clock buffer fanout from a

single or differential input to ten single-ended outputs

reduces the loading on the preceding driver and provides

an efficient clock distribution network. The PCS2P5T907A

can act as a translator from a differential HSTL, eHSTL,

1.8V/2.5V LVTTL, LVEPECL, or single-ended 1.8V/2.5V

LVTTL input to HSTL, eHSTL, 1.8V/2.5V LVTTL outputs.

Selectable interface is controlled by 3-level input signals

that may be hard-wired to appropriate high-mid-low levels.

The PCS2P5T907A has two output banks that can be

asynchronously enabled/ disabled. Multiple power and

grounds reduce noise.

Applications:

PCS2P5T907A is targeted towards Clock and signal

distribution applications.

PulseCore Semiconductor Corporation

1715 S. Bascom Ave Suite 200, Campbell, CA 95008

•

Tel: 408-879-9077

•

Fax: 408-879-9018

www.pulsecoresemi.com

Notice: The information in this document is subject to change without notice.

PCS2P5T907AG-48TR Related Products

	PCS2P5T907AG-48TR	PCS2I5T907AG-48TT	PCS2P5T907AG-48TT	PCS2P5T907A
Description	2.5V single data rate 1:10 clock buffer Terabuffer	2.5V single data rate 1:10 clock buffer Terabuffer	2.5V single data rate 1:10 clock buffer Terabuffer	2.5V single data rate 1:10 clock buffer Terabuffer
Maker	PulseCore Semiconductor Corporation	PulseCore Semiconductor Corporation	PulseCore Semiconductor Corporation	-
package instruction	6.10 MM, GREEN, MO-153ED, TSSOP-48	6.10 MM, GREEN, MO-153ED, TSSOP-48	6.10 MM, GREEN, MO-153ED, TSSOP-48	-
Reach Compliance Code	unknown	unknown	unknown	-
series	907	907	907	-
Input adjustment	DIFFERENTIAL	DIFFERENTIAL	DIFFERENTIAL	-
JESD-30 code	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	-
length	12.5 mm	12.5 mm	12.5 mm	-
Logic integrated circuit type	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER	-
Number of functions	1	1	1	-
Number of terminals	48	48	48	-
Actual output times	10	10	10	-
Maximum operating temperature	70 °C	85 °C	70 °C	-
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	-
encapsulated code	TSSOP	TSSOP	TSSOP	-
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	-
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	-
propagation delay (tpd)	2.5 ns	2.5 ns	2.5 ns	-
Certification status	Not Qualified	Not Qualified	Not Qualified	-
Same Edge Skew-Max（tskwd）	0.025 ns	0.025 ns	0.025 ns	-
Maximum seat height	1.2 mm	1.2 mm	1.2 mm	-
Maximum supply voltage (Vsup)	2.6 V	2.6 V	2.6 V	-
Minimum supply voltage (Vsup)	2.4 V	2.4 V	2.4 V	-
Nominal supply voltage (Vsup)	2.5 V	2.5 V	2.5 V	-
surface mount	YES	YES	YES	-
technology	CMOS	CMOS	CMOS	-
Temperature level	COMMERCIAL	INDUSTRIAL	COMMERCIAL	-
Terminal form	GULL WING	GULL WING	GULL WING	-
Terminal pitch	0.5 mm	0.5 mm	0.5 mm	-
Terminal location	DUAL	DUAL	DUAL	-
width	6.1 mm	6.1 mm	6.1 mm	-
minfmax	250 MHz	250 MHz	250 MHz	-

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